Search

Willis Ray Wolfe Jr.

Examiner (ID: 13816)

Most Active Art Unit
3402
Art Unit(s)
2102, 3727, 3747, 3405, 3402
Total Applications
3167
Issued Applications
2975
Pending Applications
60
Abandoned Applications
133

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 243226 [patent_doc_number] => 07588960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-15 [patent_title] => 'Nanotube device structure and methods of fabrication' [patent_app_type] => utility [patent_app_number] => 11/449969 [patent_app_country] => US [patent_app_date] => 2006-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 54 [patent_no_of_words] => 8692 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/588/07588960.pdf [firstpage_image] =>[orig_patent_app_number] => 11449969 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/449969
Nanotube device structure and methods of fabrication Jun 8, 2006 Issued
Array ( [id] => 5889183 [patent_doc_number] => 20060276001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Method for manufacturing a semiconductor device having a STI structure' [patent_app_type] => utility [patent_app_number] => 11/446181 [patent_app_country] => US [patent_app_date] => 2006-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5516 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20060276001.pdf [firstpage_image] =>[orig_patent_app_number] => 11446181 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/446181
Method for manufacturing a semiconductor device having a STI structure Jun 4, 2006 Abandoned
Array ( [id] => 401152 [patent_doc_number] => 07291516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-06 [patent_title] => 'Low temperature melt-processing of organic-inorganic hybrid' [patent_app_type] => utility [patent_app_number] => 11/446358 [patent_app_country] => US [patent_app_date] => 2006-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9908 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/291/07291516.pdf [firstpage_image] =>[orig_patent_app_number] => 11446358 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/446358
Low temperature melt-processing of organic-inorganic hybrid Jun 4, 2006 Issued
Array ( [id] => 555468 [patent_doc_number] => 07468302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-23 [patent_title] => 'Method of forming trench type isolation film of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/440532 [patent_app_country] => US [patent_app_date] => 2006-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1595 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/468/07468302.pdf [firstpage_image] =>[orig_patent_app_number] => 11440532 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/440532
Method of forming trench type isolation film of semiconductor device May 24, 2006 Issued
Array ( [id] => 8103705 [patent_doc_number] => 08153502 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-10 [patent_title] => 'Methods for filling trenches in a semiconductor material' [patent_app_type] => utility [patent_app_number] => 11/434982 [patent_app_country] => US [patent_app_date] => 2006-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3974 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/153/08153502.pdf [firstpage_image] =>[orig_patent_app_number] => 11434982 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/434982
Methods for filling trenches in a semiconductor material May 15, 2006 Issued
Array ( [id] => 5123489 [patent_doc_number] => 20070235759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'CMOS process with Si gates for nFETs and SiGe gates for pFETs' [patent_app_type] => utility [patent_app_number] => 11/401672 [patent_app_country] => US [patent_app_date] => 2006-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5916 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20070235759.pdf [firstpage_image] =>[orig_patent_app_number] => 11401672 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/401672
CMOS process with Si gates for nFETs and SiGe gates for pFETs Apr 10, 2006 Abandoned
Array ( [id] => 5705349 [patent_doc_number] => 20060194397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Application of single exposure alternating aperture phase shift mask to form sub 0.18 micron polysilicon gates' [patent_app_type] => utility [patent_app_number] => 11/391506 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4588 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20060194397.pdf [firstpage_image] =>[orig_patent_app_number] => 11391506 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/391506
Application of single exposure alternating aperture phase shift mask to form sub 0.18 micron polysilicon gates Mar 27, 2006 Abandoned
Array ( [id] => 5874527 [patent_doc_number] => 20060166431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Methods to form electronic devices and methods to form a material over a semiconductive substrate' [patent_app_type] => utility [patent_app_number] => 11/391650 [patent_app_country] => US [patent_app_date] => 2006-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4372 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20060166431.pdf [firstpage_image] =>[orig_patent_app_number] => 11391650 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/391650
Methods to form electronic devices and methods to form a material over a semiconductive substrate Mar 26, 2006 Abandoned
Array ( [id] => 5730321 [patent_doc_number] => 20060255435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'Method for encapsulating a semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/388551 [patent_app_country] => US [patent_app_date] => 2006-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2990 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20060255435.pdf [firstpage_image] =>[orig_patent_app_number] => 11388551 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/388551
Method for encapsulating a semiconductor device and semiconductor device Mar 23, 2006 Abandoned
Array ( [id] => 634132 [patent_doc_number] => 07129188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-31 [patent_title] => 'Transistor fabrication methods' [patent_app_type] => utility [patent_app_number] => 11/386062 [patent_app_country] => US [patent_app_date] => 2006-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3375 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/129/07129188.pdf [firstpage_image] =>[orig_patent_app_number] => 11386062 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/386062
Transistor fabrication methods Mar 19, 2006 Issued
Array ( [id] => 856745 [patent_doc_number] => 07375004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-20 [patent_title] => 'Method of making an isolation trench and resulting isolation trench' [patent_app_type] => utility [patent_app_number] => 11/372092 [patent_app_country] => US [patent_app_date] => 2006-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3563 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/375/07375004.pdf [firstpage_image] =>[orig_patent_app_number] => 11372092 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/372092
Method of making an isolation trench and resulting isolation trench Mar 9, 2006 Issued
Array ( [id] => 232697 [patent_doc_number] => 07598122 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-10-06 [patent_title] => 'Die attach method and microarray leadframe structure' [patent_app_type] => utility [patent_app_number] => 11/372481 [patent_app_country] => US [patent_app_date] => 2006-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 13 [patent_no_of_words] => 4212 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/598/07598122.pdf [firstpage_image] =>[orig_patent_app_number] => 11372481 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/372481
Die attach method and microarray leadframe structure Mar 7, 2006 Issued
Array ( [id] => 5005093 [patent_doc_number] => 20070202663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Managing integrated circuit stress using stress adjustment trenches' [patent_app_type] => utility [patent_app_number] => 11/364392 [patent_app_country] => US [patent_app_date] => 2006-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 12564 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20070202663.pdf [firstpage_image] =>[orig_patent_app_number] => 11364392 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/364392
Managing integrated circuit stress using stress adjustment trenches Feb 26, 2006 Issued
Array ( [id] => 5069640 [patent_doc_number] => 20070190742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'Semiconductor device including shallow trench isolator and method of forming same' [patent_app_type] => utility [patent_app_number] => 11/354952 [patent_app_country] => US [patent_app_date] => 2006-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3097 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20070190742.pdf [firstpage_image] =>[orig_patent_app_number] => 11354952 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/354952
Semiconductor device including shallow trench isolator and method of forming same Feb 15, 2006 Abandoned
Array ( [id] => 5177601 [patent_doc_number] => 20070178661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-02 [patent_title] => 'Method of forming a semiconductor isolation trench' [patent_app_type] => utility [patent_app_number] => 11/342102 [patent_app_country] => US [patent_app_date] => 2006-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3023 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20070178661.pdf [firstpage_image] =>[orig_patent_app_number] => 11342102 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/342102
Method of forming a semiconductor isolation trench Jan 26, 2006 Issued
Array ( [id] => 5733011 [patent_doc_number] => 20060258128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'Methods and apparatus for enabling multiple process steps on a single substrate' [patent_app_type] => utility [patent_app_number] => 11/329761 [patent_app_country] => US [patent_app_date] => 2006-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5904 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20060258128.pdf [firstpage_image] =>[orig_patent_app_number] => 11329761 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/329761
Methods and apparatus for enabling multiple process steps on a single substrate Jan 10, 2006 Abandoned
Array ( [id] => 5631735 [patent_doc_number] => 20060148205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Semiconductor manufacturing method for device isolation' [patent_app_type] => utility [patent_app_number] => 11/324512 [patent_app_country] => US [patent_app_date] => 2006-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5838 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20060148205.pdf [firstpage_image] =>[orig_patent_app_number] => 11324512 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/324512
Semiconductor manufacturing method for device isolation Jan 3, 2006 Abandoned
Array ( [id] => 5242383 [patent_doc_number] => 20070020878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Method for fabricating a metal-insulator-metal capacitor' [patent_app_type] => utility [patent_app_number] => 11/319411 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1469 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20070020878.pdf [firstpage_image] =>[orig_patent_app_number] => 11319411 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319411
Method for fabricating a trench isolation with spacers Dec 28, 2005 Issued
Array ( [id] => 8435439 [patent_doc_number] => 08283208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Method and apparatus for fabricating integrated circuit device using self-organizing function' [patent_app_type] => utility [patent_app_number] => 11/813032 [patent_app_country] => US [patent_app_date] => 2005-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 50823 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11813032 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/813032
Method and apparatus for fabricating integrated circuit device using self-organizing function Dec 27, 2005 Issued
Array ( [id] => 5677994 [patent_doc_number] => 20060183350 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Process for fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/292072 [patent_app_country] => US [patent_app_date] => 2005-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7519 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20060183350.pdf [firstpage_image] =>[orig_patent_app_number] => 11292072 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/292072
Process for fabricating semiconductor device Dec 1, 2005 Issued
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