Search

Woo H. Choi

Supervisory Patent Examiner (ID: 7332, Phone: (571)272-4179 , Office: P/3992 )

Most Active Art Unit
3992
Art Unit(s)
2189, 2186, 3992
Total Applications
436
Issued Applications
307
Pending Applications
82
Abandoned Applications
52

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7306429 [patent_doc_number] => 20040141439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Decoder' [patent_app_type] => new [patent_app_number] => 10/748339 [patent_app_country] => US [patent_app_date] => 2003-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5399 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20040141439.pdf [firstpage_image] =>[orig_patent_app_number] => 10748339 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/748339
Decoder Dec 28, 2003 Abandoned
Array ( [id] => 662911 [patent_doc_number] => 07107411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Apparatus method and system for fault tolerant virtual memory management' [patent_app_type] => utility [patent_app_number] => 10/737117 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9095 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/107/07107411.pdf [firstpage_image] =>[orig_patent_app_number] => 10737117 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/737117
Apparatus method and system for fault tolerant virtual memory management Dec 15, 2003 Issued
Array ( [id] => 7312575 [patent_doc_number] => 20040143716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Folding USB flash memory device for providing memory storage capacity' [patent_app_type] => new [patent_app_number] => 10/737148 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3001 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20040143716.pdf [firstpage_image] =>[orig_patent_app_number] => 10737148 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/737148
Folding USB flash memory device for providing memory storage capacity Dec 15, 2003 Issued
Array ( [id] => 7100275 [patent_doc_number] => 20050132126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Method and file structures for managing data on a flash disk' [patent_app_type] => utility [patent_app_number] => 10/734280 [patent_app_country] => US [patent_app_date] => 2003-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4322 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20050132126.pdf [firstpage_image] =>[orig_patent_app_number] => 10734280 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/734280
Method and file structures for managing data on a flash disk Dec 14, 2003 Issued
Array ( [id] => 400517 [patent_doc_number] => 07296112 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-11-13 [patent_title] => 'High bandwidth memory management using multi-bank DRAM devices' [patent_app_type] => utility [patent_app_number] => 10/734082 [patent_app_country] => US [patent_app_date] => 2003-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8169 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/296/07296112.pdf [firstpage_image] =>[orig_patent_app_number] => 10734082 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/734082
High bandwidth memory management using multi-bank DRAM devices Dec 9, 2003 Issued
Array ( [id] => 659299 [patent_doc_number] => 07111126 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-19 [patent_title] => 'Apparatus and method for loading data values' [patent_app_type] => utility [patent_app_number] => 10/668373 [patent_app_country] => US [patent_app_date] => 2003-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12623 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/111/07111126.pdf [firstpage_image] =>[orig_patent_app_number] => 10668373 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/668373
Apparatus and method for loading data values Sep 23, 2003 Issued
Array ( [id] => 943561 [patent_doc_number] => 06970993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-29 [patent_title] => 'Architecture to relax memory performance requirements' [patent_app_type] => utility [patent_app_number] => 10/658058 [patent_app_country] => US [patent_app_date] => 2003-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4296 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970993.pdf [firstpage_image] =>[orig_patent_app_number] => 10658058 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/658058
Architecture to relax memory performance requirements Sep 7, 2003 Issued
Array ( [id] => 958094 [patent_doc_number] => 06957298 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-10-18 [patent_title] => 'System and method for a high bandwidth-low latency memory controller' [patent_app_type] => utility [patent_app_number] => 10/657957 [patent_app_country] => US [patent_app_date] => 2003-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5984 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/957/06957298.pdf [firstpage_image] =>[orig_patent_app_number] => 10657957 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/657957
System and method for a high bandwidth-low latency memory controller Sep 7, 2003 Issued
Array ( [id] => 581640 [patent_doc_number] => 07159081 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-02 [patent_title] => 'Automatic scenario management for a policy-based storage system' [patent_app_type] => utility [patent_app_number] => 10/649705 [patent_app_country] => US [patent_app_date] => 2003-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3490 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/159/07159081.pdf [firstpage_image] =>[orig_patent_app_number] => 10649705 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/649705
Automatic scenario management for a policy-based storage system Aug 27, 2003 Issued
Array ( [id] => 662855 [patent_doc_number] => 07107389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-12 [patent_title] => 'Semiconductor memory device and method for writing data into flash memory' [patent_app_type] => utility [patent_app_number] => 10/486960 [patent_app_country] => US [patent_app_date] => 2003-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9880 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/107/07107389.pdf [firstpage_image] =>[orig_patent_app_number] => 10486960 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/486960
Semiconductor memory device and method for writing data into flash memory Aug 24, 2003 Issued
Array ( [id] => 472818 [patent_doc_number] => 07234020 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-19 [patent_title] => 'Fault notification based on volume access control information' [patent_app_type] => utility [patent_app_number] => 10/629554 [patent_app_country] => US [patent_app_date] => 2003-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7006 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/234/07234020.pdf [firstpage_image] =>[orig_patent_app_number] => 10629554 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/629554
Fault notification based on volume access control information Jul 29, 2003 Issued
Array ( [id] => 7333214 [patent_doc_number] => 20040255087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Scalable rundown protection for object lifetime management' [patent_app_type] => new [patent_app_number] => 10/461755 [patent_app_country] => US [patent_app_date] => 2003-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5620 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20040255087.pdf [firstpage_image] =>[orig_patent_app_number] => 10461755 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/461755
Scalable rundown protection for object lifetime management Jun 12, 2003 Issued
Array ( [id] => 7333222 [patent_doc_number] => 20040255091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Random access time to data stored on LTO tape by incorporating stacked cartridge memory (CM) modules' [patent_app_type] => new [patent_app_number] => 10/461627 [patent_app_country] => US [patent_app_date] => 2003-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3823 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20040255091.pdf [firstpage_image] =>[orig_patent_app_number] => 10461627 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/461627
Random access time to data stored on LTO tape by incorporating stacked cartridge memory (CM) modules Jun 12, 2003 Issued
Array ( [id] => 392792 [patent_doc_number] => 07302523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-27 [patent_title] => 'Data storage' [patent_app_type] => utility [patent_app_number] => 10/461753 [patent_app_country] => US [patent_app_date] => 2003-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 5137 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/302/07302523.pdf [firstpage_image] =>[orig_patent_app_number] => 10461753 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/461753
Data storage Jun 12, 2003 Issued
Array ( [id] => 7333220 [patent_doc_number] => 20040255090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Tracking cells for a memory system' [patent_app_type] => new [patent_app_number] => 10/461244 [patent_app_country] => US [patent_app_date] => 2003-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12952 [patent_no_of_claims] => 75 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20040255090.pdf [firstpage_image] =>[orig_patent_app_number] => 10461244 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/461244
Tracking cells for a memory system Jun 12, 2003 Issued
Array ( [id] => 7333215 [patent_doc_number] => 20040255088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Pipeline circuit for low latency memory' [patent_app_type] => new [patent_app_number] => 10/461295 [patent_app_country] => US [patent_app_date] => 2003-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3823 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20040255088.pdf [firstpage_image] =>[orig_patent_app_number] => 10461295 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/461295
Pipeline circuit for low latency memory Jun 12, 2003 Issued
10/461604 Computerized system for facilitating transactions between parties on the internet using e-mail Jun 11, 2003 Abandoned
Array ( [id] => 6665370 [patent_doc_number] => 20030204697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Mechanism for synchronizing multiple skewed source-synchronous data channels with automatic initialization feature' [patent_app_type] => new [patent_app_number] => 10/441451 [patent_app_country] => US [patent_app_date] => 2003-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5196 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20030204697.pdf [firstpage_image] =>[orig_patent_app_number] => 10441451 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/441451
Mechanism for synchronizing multiple skewed source-synchronous data channels with automatic initialization feature May 19, 2003 Issued
Array ( [id] => 945787 [patent_doc_number] => 06968432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-22 [patent_title] => 'Method and system for altering a sequence number assignment pattern while preserving integrity and high concurrency in a multi-system shared disk environment' [patent_app_type] => utility [patent_app_number] => 10/439686 [patent_app_country] => US [patent_app_date] => 2003-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4997 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/968/06968432.pdf [firstpage_image] =>[orig_patent_app_number] => 10439686 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/439686
Method and system for altering a sequence number assignment pattern while preserving integrity and high concurrency in a multi-system shared disk environment May 15, 2003 Issued
Array ( [id] => 7436030 [patent_doc_number] => 20040230737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-18 [patent_title] => 'Methods and systems of cache memory management and snapshot operations' [patent_app_type] => new [patent_app_number] => 10/440347 [patent_app_country] => US [patent_app_date] => 2003-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5478 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20040230737.pdf [firstpage_image] =>[orig_patent_app_number] => 10440347 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/440347
Methods and systems of cache memory management and snapshot operations May 15, 2003 Issued
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