Xia L. Cross

Array ( [id] => 14738711 [patent_doc_number] => 10388766 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-20 [patent_title] => Vertical transport FET (VFET) with dual top spacer [patent_app_type] => utility [patent_app_number] => 15/791095 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 45 [patent_no_of_words] => 7735 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791095 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14221493 [patent_doc_number] => 20190123131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-25 [patent_title] => SMALL-GAP COPLANAR TUNABLE CAPACITORS AND METHODS FOR MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 15/791177 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791177 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13769359 [patent_doc_number] => 10177029 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-01-08 [patent_title] => Integration of air gaps with back-end-of-line structures [patent_app_type] => utility [patent_app_number] => 15/790249 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3206 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790249 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12824146 [patent_doc_number] => 20180166554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD [patent_app_type] => utility [patent_app_number] => 15/790195 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790195 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12849697 [patent_doc_number] => 20180175072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/790197 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13667719 [patent_doc_number] => 10164041 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-25 [patent_title] => Method of forming gate-all-around (GAA) FinFET and GAA FinFET formed thereby [patent_app_type] => utility [patent_app_number] => 15/790216 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5189 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790216 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13405493 [patent_doc_number] => 20180254289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => PATTERNING METHOD EMPLOYING HALF TONE MASK, ARRAY SUBSTRATE AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/791107 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7589 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791107 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13349911 [patent_doc_number] => 20180226495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/790484 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790484 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14558463 [patent_doc_number] => 10347704 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Organic light-emitting display device [patent_app_type] => utility [patent_app_number] => 15/783002 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5031 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783002 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16249598 [patent_doc_number] => 10748973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Display device with film groove having inclined and stepped side surface [patent_app_type] => utility [patent_app_number] => 15/783101 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 12288 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783101 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13559223 [patent_doc_number] => 20180331159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 15/783000 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783000 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12181681 [patent_doc_number] => 20180040617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'Method and Structure for Gap Filling Improvement' [patent_app_type] => utility [patent_app_number] => 15/783448 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6963 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783448 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17410227 [patent_doc_number] => 11251124 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Power grid structures and method of forming the same [patent_app_type] => utility [patent_app_number] => 15/729281 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 28 [patent_no_of_words] => 29256 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 608 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729281 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14164331 [patent_doc_number] => 20190109268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => LED PACKAGE INCLUDING CONVERTER CONFINEMENT [patent_app_type] => utility [patent_app_number] => 15/729269 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729269 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13769721 [patent_doc_number] => 10177210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Display device having redundant wirings [patent_app_type] => utility [patent_app_number] => 15/728985 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 9234 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15728985 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13363905 [patent_doc_number] => 20180233492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => TRIANGULAR-COMBINATION LED CIRCUIT BOARD, TRIANGULAR LED DEVICE AND DISPLAY [patent_app_type] => utility [patent_app_number] => 15/729119 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4260 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12554496 [patent_doc_number] => 10014390 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-03 [patent_title] => Inner spacer formation for nanosheet field-effect transistors with tall suspensions [patent_app_type] => utility [patent_app_number] => 15/729105 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5008 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15857561 [patent_doc_number] => 10644082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Organic EL element with inorganic insulation layer and method for production thereof [patent_app_type] => utility [patent_app_number] => 15/722407 [patent_app_country] => US [patent_app_date] => 2017-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 8701 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15722407 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12122391 [patent_doc_number] => 20180005976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'Mechanisms For Forming Bonding Structures' [patent_app_type] => utility [patent_app_number] => 15/707954 [patent_app_country] => US [patent_app_date] => 2017-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5905 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15707954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15274825 [patent_doc_number] => 20190386147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => LOWER TEMPERATURE POLYCRYSTAL SILICON THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/736150 [patent_app_country] => US [patent_app_date] => 2017-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15736150 [rel_patent_id] =>[rel_patent_doc_number] =>)