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Xiaochun L. Chen

Examiner (ID: 8065, Phone: (571)272-0941 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
724
Issued Applications
657
Pending Applications
55
Abandoned Applications
39

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19803751 [patent_doc_number] => 20250069676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => PREDICTIVE PROGRAM VERIFICATION [patent_app_type] => utility [patent_app_number] => 18/785866 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11785 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785866 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/785866
PREDICTIVE PROGRAM VERIFICATION Jul 25, 2024 Pending
Array ( [id] => 19803751 [patent_doc_number] => 20250069676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => PREDICTIVE PROGRAM VERIFICATION [patent_app_type] => utility [patent_app_number] => 18/785866 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11785 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785866 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/785866
PREDICTIVE PROGRAM VERIFICATION Jul 25, 2024 Pending
Array ( [id] => 19834077 [patent_doc_number] => 20250085863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => MANAGING AN ORDER OF PROGRAMMING OPERATIONS IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/779926 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11517 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779926 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/779926
MANAGING AN ORDER OF PROGRAMMING OPERATIONS IN A MEMORY SUB-SYSTEM Jul 21, 2024 Pending
Array ( [id] => 19726918 [patent_doc_number] => 20250029669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => Multibit High Density Read Only Memory Using Multiple Reference Biases [patent_app_type] => utility [patent_app_number] => 18/776254 [patent_app_country] => US [patent_app_date] => 2024-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13971 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18776254 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/776254
Multibit High Density Read Only Memory Using Multiple Reference Biases Jul 17, 2024 Pending
Array ( [id] => 19712367 [patent_doc_number] => 20250022509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => METHOD OF OPERATING PHASE CHANGE MEMORIES, CORRESPONDING DEVICE AND COMPUTER PROGRAM PRODUCT [patent_app_type] => utility [patent_app_number] => 18/769493 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14033 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18769493 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/769493
METHOD OF OPERATING PHASE CHANGE MEMORIES, CORRESPONDING DEVICE AND COMPUTER PROGRAM PRODUCT Jul 10, 2024 Pending
Array ( [id] => 20209425 [patent_doc_number] => 20250279145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => SEMICONDUCTOR MEMORY APPARATUS AND METHOD FOR CONTROLLING A SEMICONDUCTOR MEMORY APPARATUS VERIFICATION OPERATION [patent_app_type] => utility [patent_app_number] => 18/767635 [patent_app_country] => US [patent_app_date] => 2024-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18767635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/767635
SEMICONDUCTOR MEMORY APPARATUS AND METHOD FOR CONTROLLING A SEMICONDUCTOR MEMORY APPARATUS VERIFICATION OPERATION Jul 8, 2024 Pending
Array ( [id] => 19531493 [patent_doc_number] => 20240355395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => DRIFT COMPENSATION FOR CODEWORDS IN MEMORY [patent_app_type] => utility [patent_app_number] => 18/759032 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18759032 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/759032
DRIFT COMPENSATION FOR CODEWORDS IN MEMORY Jun 27, 2024 Pending
Array ( [id] => 19696075 [patent_doc_number] => 20250014620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => MEMORY DEVICE COMPRISING MEMORY CELLS STORING CALIBRATION DATA AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/754774 [patent_app_country] => US [patent_app_date] => 2024-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11756 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18754774 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/754774
MEMORY DEVICE COMPRISING MEMORY CELLS STORING CALIBRATION DATA AND OPERATING METHOD THEREOF Jun 25, 2024 Pending
Array ( [id] => 19483739 [patent_doc_number] => 20240331781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => EVALUATION OF BACKGROUND LEAKAGE TO SELECT WRITE VOLTAGE IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/744335 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744335 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744335
EVALUATION OF BACKGROUND LEAKAGE TO SELECT WRITE VOLTAGE IN MEMORY DEVICES Jun 13, 2024 Pending
Array ( [id] => 20416643 [patent_doc_number] => 12499933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => SRAM structures [patent_app_type] => utility [patent_app_number] => 18/741051 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 6662 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741051 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/741051
SRAM STRUCTURES Jun 11, 2024 Issued
Array ( [id] => 19634338 [patent_doc_number] => 20240412787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => RESAMPLE START VOLTAGE FOR CALIBRATION IN A PROGRAM OPERATION IMPROVEMENT [patent_app_type] => utility [patent_app_number] => 18/733377 [patent_app_country] => US [patent_app_date] => 2024-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12683 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18733377 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/733377
RESAMPLE START VOLTAGE FOR CALIBRATION IN A PROGRAM OPERATION IMPROVEMENT Jun 3, 2024 Pending
Array ( [id] => 20161158 [patent_doc_number] => 12387791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Memory device with improved program performance and method of operating the same [patent_app_type] => utility [patent_app_number] => 18/732377 [patent_app_country] => US [patent_app_date] => 2024-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 6027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18732377 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/732377
Memory device with improved program performance and method of operating the same Jun 2, 2024 Issued
Array ( [id] => 20161158 [patent_doc_number] => 12387791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Memory device with improved program performance and method of operating the same [patent_app_type] => utility [patent_app_number] => 18/732377 [patent_app_country] => US [patent_app_date] => 2024-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 6027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18732377 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/732377
Memory device with improved program performance and method of operating the same Jun 2, 2024 Issued
Array ( [id] => 19634354 [patent_doc_number] => 20240412803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => REDUCING PARTIAL BLOCK PROGRAMMING USING DYNAMIC TRIM SETTINGS [patent_app_type] => utility [patent_app_number] => 18/676267 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6465 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18676267 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/676267
REDUCING PARTIAL BLOCK PROGRAMMING USING DYNAMIC TRIM SETTINGS May 27, 2024 Pending
Array ( [id] => 20189598 [patent_doc_number] => 12400721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Tracking RC time constant by wordline in memory devices [patent_app_type] => utility [patent_app_number] => 18/671835 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8355 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671835 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671835
Tracking RC time constant by wordline in memory devices May 21, 2024 Issued
Array ( [id] => 20189598 [patent_doc_number] => 12400721 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Tracking RC time constant by wordline in memory devices [patent_app_type] => utility [patent_app_number] => 18/671835 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8355 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671835 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671835
Tracking RC time constant by wordline in memory devices May 21, 2024 Issued
Array ( [id] => 19435762 [patent_doc_number] => 20240304260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => NON-VOLATILE MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME AND READ METHOD OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/666819 [patent_app_country] => US [patent_app_date] => 2024-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4510 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18666819 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/666819
Non-volatile memory device, memory system including the same and read method of memory system May 16, 2024 Issued
Array ( [id] => 19435762 [patent_doc_number] => 20240304260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => NON-VOLATILE MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME AND READ METHOD OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/666819 [patent_app_country] => US [patent_app_date] => 2024-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4510 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18666819 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/666819
Non-volatile memory device, memory system including the same and read method of memory system May 16, 2024 Issued
Array ( [id] => 20352483 [patent_doc_number] => 20250349335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => MEMORY CELL ARRANGEMENTS AND METHOD OF OPERATING A MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/662013 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662013 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662013
MEMORY CELL ARRANGEMENTS AND METHOD OF OPERATING A MEMORY CELL May 12, 2024 Pending
Array ( [id] => 20352483 [patent_doc_number] => 20250349335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => MEMORY CELL ARRANGEMENTS AND METHOD OF OPERATING A MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/662013 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14377 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662013 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662013
MEMORY CELL ARRANGEMENTS AND METHOD OF OPERATING A MEMORY CELL May 12, 2024 Pending
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