Search

Xiaochun L. Chen

Examiner (ID: 8065, Phone: (571)272-0941 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
724
Issued Applications
657
Pending Applications
55
Abandoned Applications
39

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19873526 [patent_doc_number] => 12266395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Memory device and operation method thereof [patent_app_type] => utility [patent_app_number] => 18/330404 [patent_app_country] => US [patent_app_date] => 2023-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4509 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18330404 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/330404
Memory device and operation method thereof Jun 6, 2023 Issued
Array ( [id] => 18864035 [patent_doc_number] => 20230418471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => APPARATUSES AND METHODS FOR CONFIGURABLE MEMORY ARRAY BANK ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 18/326303 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18326303 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/326303
Apparatuses and methods for configurable memory array bank architectures May 30, 2023 Issued
Array ( [id] => 19964631 [patent_doc_number] => 12334146 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-17 [patent_title] => Power loss reduction in data storage arrays [patent_app_type] => utility [patent_app_number] => 18/324797 [patent_app_country] => US [patent_app_date] => 2023-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9211 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18324797 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/324797
Power loss reduction in data storage arrays May 25, 2023 Issued
Array ( [id] => 19964631 [patent_doc_number] => 12334146 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-06-17 [patent_title] => Power loss reduction in data storage arrays [patent_app_type] => utility [patent_app_number] => 18/324797 [patent_app_country] => US [patent_app_date] => 2023-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9211 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18324797 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/324797
Power loss reduction in data storage arrays May 25, 2023 Issued
Array ( [id] => 19384334 [patent_doc_number] => 20240274204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => OPERATION METHODS OF MEMORIES, MEMORIES, AND STORAGE SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/324001 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10700 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18324001 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/324001
OPERATION METHODS OF MEMORIES, MEMORIES, AND STORAGE SYSTEMS May 24, 2023 Pending
Array ( [id] => 20132096 [patent_doc_number] => 12374413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Meta model extension for a machine learning equalizer [patent_app_type] => utility [patent_app_number] => 18/322170 [patent_app_country] => US [patent_app_date] => 2023-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11167 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18322170 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/322170
Meta model extension for a machine learning equalizer May 22, 2023 Issued
Array ( [id] => 19812184 [patent_doc_number] => 12243592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => One time programmable memory [patent_app_type] => utility [patent_app_number] => 18/317665 [patent_app_country] => US [patent_app_date] => 2023-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18317665 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/317665
One time programmable memory May 14, 2023 Issued
Array ( [id] => 19539241 [patent_doc_number] => 12131796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory die [patent_app_type] => utility [patent_app_number] => 18/195860 [patent_app_country] => US [patent_app_date] => 2023-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6834 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195860 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195860
Memory bandwidth aggregation using simultaneous access of stacked semiconductor memory die May 9, 2023 Issued
Array ( [id] => 19574874 [patent_doc_number] => 20240379166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => PV Distribution Variation Detection and Data Reclaim Policy [patent_app_type] => utility [patent_app_number] => 18/314568 [patent_app_country] => US [patent_app_date] => 2023-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18314568 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/314568
PV distribution variation detection and data reclaim policy May 8, 2023 Issued
Array ( [id] => 18655235 [patent_doc_number] => 20230301086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/138820 [patent_app_country] => US [patent_app_date] => 2023-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22367 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18138820 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/138820
Semiconductor memory device Apr 24, 2023 Issued
Array ( [id] => 18555047 [patent_doc_number] => 20230253063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => REPAIRABLE LATCH ARRAY [patent_app_type] => utility [patent_app_number] => 18/302510 [patent_app_country] => US [patent_app_date] => 2023-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8217 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18302510 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/302510
Repairable latch array Apr 17, 2023 Issued
Array ( [id] => 19093730 [patent_doc_number] => 11955194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Tracking and refreshing state metrics in memory sub-systems [patent_app_type] => utility [patent_app_number] => 18/133103 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18133103 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/133103
Tracking and refreshing state metrics in memory sub-systems Apr 10, 2023 Issued
Array ( [id] => 20161168 [patent_doc_number] => 12387801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Memory device and method of operating the memory device [patent_app_type] => utility [patent_app_number] => 18/298915 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4732 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298915 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/298915
Memory device and method of operating the memory device Apr 10, 2023 Issued
Array ( [id] => 19972217 [patent_doc_number] => 12340835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Semiconductor memory device capable of synchronizing clock signals in CS geardown mode [patent_app_type] => utility [patent_app_number] => 18/297908 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4942 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18297908 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/297908
Semiconductor memory device capable of synchronizing clock signals in CS geardown mode Apr 9, 2023 Issued
Array ( [id] => 19972217 [patent_doc_number] => 12340835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Semiconductor memory device capable of synchronizing clock signals in CS geardown mode [patent_app_type] => utility [patent_app_number] => 18/297908 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4942 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18297908 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/297908
Semiconductor memory device capable of synchronizing clock signals in CS geardown mode Apr 9, 2023 Issued
Array ( [id] => 18555017 [patent_doc_number] => 20230253033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => Memory Device Having Variable Impedance Memory Cells and Time-to-Transition Sensing of Data Stored Therein [patent_app_type] => utility [patent_app_number] => 18/297605 [patent_app_country] => US [patent_app_date] => 2023-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18297605 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/297605
Memory device having variable impedance memory cells and time-to-transition sensing of data stored therein Apr 7, 2023 Issued
Array ( [id] => 19733576 [patent_doc_number] => 12211576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Determination circuit and memory device and peripheral circuit thereof [patent_app_type] => utility [patent_app_number] => 18/295013 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4684 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295013 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/295013
Determination circuit and memory device and peripheral circuit thereof Apr 2, 2023 Issued
Array ( [id] => 20389090 [patent_doc_number] => 12488823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Memory device and operation method thereof [patent_app_type] => utility [patent_app_number] => 18/119458 [patent_app_country] => US [patent_app_date] => 2023-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18119458 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/119458
Memory device and operation method thereof Mar 8, 2023 Issued
Array ( [id] => 19427933 [patent_doc_number] => 12087361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 18/177320 [patent_app_country] => US [patent_app_date] => 2023-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 9489 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18177320 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/177320
Memory device and operating method thereof Mar 1, 2023 Issued
Array ( [id] => 18721251 [patent_doc_number] => 11798603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Circuit for generating and trimming phases for memory cell read operations [patent_app_type] => utility [patent_app_number] => 18/175375 [patent_app_country] => US [patent_app_date] => 2023-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8585 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18175375 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/175375
Circuit for generating and trimming phases for memory cell read operations Feb 26, 2023 Issued
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