Search

Xiaoming Liu

Examiner (ID: 12447, Phone: (571)270-0384 , Office: P/2812 )

Most Active Art Unit
2812
Art Unit(s)
2812
Total Applications
673
Issued Applications
518
Pending Applications
97
Abandoned Applications
80

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16959272 [patent_doc_number] => 11063156 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-13 [patent_title] => Memory device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/858746 [patent_app_country] => US [patent_app_date] => 2020-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5175 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16858746 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/858746
Memory device and manufacturing method thereof Apr 26, 2020 Issued
Array ( [id] => 17174363 [patent_doc_number] => 20210328034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => FLASH MEMORY DEVICE INCLUDING A BURIED FLOATING GATE AND A BURIED ERASE GATE AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/852654 [patent_app_country] => US [patent_app_date] => 2020-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9750 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16852654 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/852654
Flash memory device including a buried floating gate and a buried erase gate and methods of forming the same Apr 19, 2020 Issued
Array ( [id] => 17047970 [patent_doc_number] => 11101160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Device packaging using a recyclable carrier substrate [patent_app_type] => utility [patent_app_number] => 16/845455 [patent_app_country] => US [patent_app_date] => 2020-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 7827 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16845455 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/845455
Device packaging using a recyclable carrier substrate Apr 9, 2020 Issued
Array ( [id] => 16180654 [patent_doc_number] => 20200227623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => ASSEMBLY OF PIEZOELECTRIC MATERIAL SUBSTRATE AND SUPPORT SUBSTRATE, AND METHOD FOR MANUFACTURING SAID ASSEMBLY [patent_app_type] => utility [patent_app_number] => 16/834159 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5175 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16834159 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/834159
Assembly of piezoelectric material substrate and support substrate, and method for manufacturing said assembly Mar 29, 2020 Issued
Array ( [id] => 17002638 [patent_doc_number] => 11081461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Packaging process and packaging structure [patent_app_type] => utility [patent_app_number] => 16/824021 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 47 [patent_no_of_words] => 4643 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16824021 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/824021
Packaging process and packaging structure Mar 18, 2020 Issued
Array ( [id] => 17252502 [patent_doc_number] => 11187986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-30 [patent_title] => Apparatuses for reducing metal residue in edge bead region from metal-containing resists [patent_app_type] => utility [patent_app_number] => 16/810924 [patent_app_country] => US [patent_app_date] => 2020-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 9416 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810924 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/810924
Apparatuses for reducing metal residue in edge bead region from metal-containing resists Mar 5, 2020 Issued
Array ( [id] => 17011069 [patent_doc_number] => 20210242230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => CHARGE TRAP MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/781527 [patent_app_country] => US [patent_app_date] => 2020-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6841 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16781527 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/781527
Charge trap memory devices Feb 3, 2020 Issued
Array ( [id] => 16001049 [patent_doc_number] => 20200176395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => STACKED CHIP PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/780921 [patent_app_country] => US [patent_app_date] => 2020-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16780921 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/780921
Stacked chip package structure and manufacturing method thereof Feb 3, 2020 Issued
Array ( [id] => 16696868 [patent_doc_number] => 10947451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Nitride fluorescent material, method of producing nitride fluorescent material and light emitting device [patent_app_type] => utility [patent_app_number] => 16/779642 [patent_app_country] => US [patent_app_date] => 2020-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 10154 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16779642 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/779642
Nitride fluorescent material, method of producing nitride fluorescent material and light emitting device Feb 1, 2020 Issued
Array ( [id] => 15939223 [patent_doc_number] => 20200161245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => METHOD FOR FABRICATING GLASS SUBSTRATE PACKAGE [patent_app_type] => utility [patent_app_number] => 16/752650 [patent_app_country] => US [patent_app_date] => 2020-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13056 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16752650 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/752650
Chip package Jan 25, 2020 Issued
Array ( [id] => 16981619 [patent_doc_number] => 20210225856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => CELL STRUCTURE AND OPERATION OF SELF-ALIGNED PMOS FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 16/745364 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745364 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/745364
CELL STRUCTURE AND OPERATION OF SELF-ALIGNED PMOS FLASH MEMORY Jan 16, 2020 Abandoned
Array ( [id] => 16180377 [patent_doc_number] => 20200227346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => SUBSTRATE STRUCTURE WITH HIGH-DENSITY WIRING AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/736825 [patent_app_country] => US [patent_app_date] => 2020-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6722 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736825 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/736825
Substrate structure with high-density wiring and manufacturing method thereof Jan 7, 2020 Issued
Array ( [id] => 17326642 [patent_doc_number] => 11217668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/736862 [patent_app_country] => US [patent_app_date] => 2020-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 89 [patent_no_of_words] => 39186 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16736862 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/736862
Semiconductor device and manufacturing method thereof Jan 7, 2020 Issued
Array ( [id] => 18827708 [patent_doc_number] => 11842998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Semiconductor device and method of forming the semiconductor device [patent_app_type] => utility [patent_app_number] => 16/731210 [patent_app_country] => US [patent_app_date] => 2019-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 4093 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16731210 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/731210
Semiconductor device and method of forming the semiconductor device Dec 30, 2019 Issued
Array ( [id] => 15841155 [patent_doc_number] => 20200135860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => INTEGRATED CIRCUIT, LDMOS WITH BOTTOM GATE AND BALLAST DRIFT [patent_app_type] => utility [patent_app_number] => 16/729824 [patent_app_country] => US [patent_app_date] => 2019-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6151 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729824 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729824
Integrated circuit, LDMOS with bottom gate and ballast drift Dec 29, 2019 Issued
Array ( [id] => 17652606 [patent_doc_number] => 11355345 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Method for preventing line bending during metal fill process [patent_app_type] => utility [patent_app_number] => 16/724231 [patent_app_country] => US [patent_app_date] => 2019-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 44 [patent_no_of_words] => 19535 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724231 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/724231
Method for preventing line bending during metal fill process Dec 20, 2019 Issued
Array ( [id] => 15841373 [patent_doc_number] => 20200135969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => Semiconductor Component and Illumination Device [patent_app_type] => utility [patent_app_number] => 16/723308 [patent_app_country] => US [patent_app_date] => 2019-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16723308 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/723308
Semiconductor component and illumination device Dec 19, 2019 Issued
Array ( [id] => 19898135 [patent_doc_number] => 12276044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Low etch pit density gallium arsenide crystals with boron dopant [patent_app_type] => utility [patent_app_number] => 16/711882 [patent_app_country] => US [patent_app_date] => 2019-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711882 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711882
Low etch pit density gallium arsenide crystals with boron dopant Dec 11, 2019 Issued
Array ( [id] => 17303304 [patent_doc_number] => 20210399143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => PIN DIODES WITH MULTI-THICKNESS INTRINSIC REGIONS [patent_app_type] => utility [patent_app_number] => 17/289990 [patent_app_country] => US [patent_app_date] => 2019-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17289990 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/289990
PIN diodes with multi-thickness intrinsic regions Dec 1, 2019 Issued
Array ( [id] => 19358442 [patent_doc_number] => 12058925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Display assembly and manufacturing method thereof and display device [patent_app_type] => utility [patent_app_number] => 16/975691 [patent_app_country] => US [patent_app_date] => 2019-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16975691 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/975691
Display assembly and manufacturing method thereof and display device Nov 27, 2019 Issued
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