
Xuan Marian Thai
Examiner (ID: 451)
| Most Active Art Unit | 3715 |
| Art Unit(s) | 2781, 3714, 3713, 3403, 3715, 2181, 2111, 2782 |
| Total Applications | 775 |
| Issued Applications | 391 |
| Pending Applications | 172 |
| Abandoned Applications | 214 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7645924
[patent_doc_number] => 06477599
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-11-05
[patent_title] => 'Data processing system and microcomputer'
[patent_app_type] => B1
[patent_app_number] => 09/186075
[patent_app_country] => US
[patent_app_date] => 1998-11-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/477/06477599.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/186075 | Data processing system and microcomputer | Nov 4, 1998 | Issued |
Array
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[patent_doc_number] => 06170027
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-02
[patent_title] => 'LPC/ISA bridge and its bridging method'
[patent_app_type] => 1
[patent_app_number] => 9/186956
[patent_app_country] => US
[patent_app_date] => 1998-11-05
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/170/06170027.pdf
[firstpage_image] =>[orig_patent_app_number] => 186956
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/186956 | LPC/ISA bridge and its bridging method | Nov 4, 1998 | Issued |
Array
(
[id] => 4380788
[patent_doc_number] => 06256681
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Data buffer for programmable memory'
[patent_app_type] => 1
[patent_app_number] => 9/185088
[patent_app_country] => US
[patent_app_date] => 1998-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2667
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[pdf_file] => patents/06/256/06256681.pdf
[firstpage_image] =>[orig_patent_app_number] => 185088
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/185088 | Data buffer for programmable memory | Nov 2, 1998 | Issued |
Array
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[patent_doc_number] => 06304919
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-16
[patent_title] => 'Fixed frame for a drawout electrical switch'
[patent_app_type] => 1
[patent_app_number] => 9/184118
[patent_app_country] => US
[patent_app_date] => 1998-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 1733
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[pdf_file] => patents/06/304/06304919.pdf
[firstpage_image] =>[orig_patent_app_number] => 184118
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/184118 | Fixed frame for a drawout electrical switch | Nov 1, 1998 | Issued |
Array
(
[id] => 4122452
[patent_doc_number] => 06052791
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-18
[patent_title] => 'Control method for a hard disk drive and a data processor reducing power consumption of the hard disk drive'
[patent_app_type] => 1
[patent_app_number] => 9/172039
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[pdf_file] => patents/06/052/06052791.pdf
[firstpage_image] =>[orig_patent_app_number] => 172039
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/172039 | Control method for a hard disk drive and a data processor reducing power consumption of the hard disk drive | Oct 13, 1998 | Issued |
Array
(
[id] => 4324423
[patent_doc_number] => 06327634
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-04
[patent_title] => 'System and method for compressing and decompressing configuration data for an FPGA'
[patent_app_type] => 1
[patent_app_number] => 9/139529
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[patent_app_date] => 1998-08-25
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[pdf_file] => patents/06/327/06327634.pdf
[firstpage_image] =>[orig_patent_app_number] => 139529
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/139529 | System and method for compressing and decompressing configuration data for an FPGA | Aug 24, 1998 | Issued |
Array
(
[id] => 4351696
[patent_doc_number] => 06314484
[patent_country] => US
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[patent_issue_date] => 2001-11-06
[patent_title] => 'Computer system with a bus having a segmented structure'
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[patent_app_country] => US
[patent_app_date] => 1998-07-09
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[pdf_file] => patents/06/314/06314484.pdf
[firstpage_image] =>[orig_patent_app_number] => 112520
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/112520 | Computer system with a bus having a segmented structure | Jul 8, 1998 | Issued |
Array
(
[id] => 4223615
[patent_doc_number] => 06078976
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-20
[patent_title] => 'Bridge device that prevents decrease in the data transfer efficiency of buses'
[patent_app_type] => 1
[patent_app_number] => 9/102685
[patent_app_country] => US
[patent_app_date] => 1998-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[pdf_file] => patents/06/078/06078976.pdf
[firstpage_image] =>[orig_patent_app_number] => 102685
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/102685 | Bridge device that prevents decrease in the data transfer efficiency of buses | Jun 22, 1998 | Issued |
Array
(
[id] => 4151419
[patent_doc_number] => 06035353
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-07
[patent_title] => 'Computer including data signal monitoring circuit'
[patent_app_type] => 1
[patent_app_number] => 9/087498
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[firstpage_image] =>[orig_patent_app_number] => 087498
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/087498 | Computer including data signal monitoring circuit | May 28, 1998 | Issued |
Array
(
[id] => 4114336
[patent_doc_number] => 06049841
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[patent_issue_date] => 2000-04-11
[patent_title] => 'Method and apparatus of selecting data transmission channels'
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[patent_app_number] => 9/085196
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[patent_app_date] => 1998-05-27
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[pdf_file] => patents/06/049/06049841.pdf
[firstpage_image] =>[orig_patent_app_number] => 085196
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/085196 | Method and apparatus of selecting data transmission channels | May 26, 1998 | Issued |
Array
(
[id] => 4100793
[patent_doc_number] => 06018780
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-01-25
[patent_title] => 'Method and apparatus for downloading a file to a remote unit'
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[pdf_file] => patents/06/018/06018780.pdf
[firstpage_image] =>[orig_patent_app_number] => 081192
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/081192 | Method and apparatus for downloading a file to a remote unit | May 18, 1998 | Issued |
Array
(
[id] => 4132971
[patent_doc_number] => 06047345
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[patent_issue_date] => 2000-04-04
[patent_title] => 'Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgment'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/078713 | Method for controlling a bus to progress transfer cycles without inserting a cycle for acknowledgment | May 13, 1998 | Issued |
Array
(
[id] => 4036773
[patent_doc_number] => 05968156
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[patent_title] => 'Programmable peripheral component interconnect (PCI) bridge for interfacing a PCI bus and a local bus having reconstructable interface logic circuit therein'
[patent_app_type] => 1
[patent_app_number] => 9/063428
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/063428 | Programmable peripheral component interconnect (PCI) bridge for interfacing a PCI bus and a local bus having reconstructable interface logic circuit therein | Apr 20, 1998 | Issued |
Array
(
[id] => 4195515
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[patent_title] => 'Control circuit for switching a processor between multiple low power states to allow cache snoops'
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[patent_app_number] => 9/056838
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/044660 | System and method for efficient communication between buses | Mar 18, 1998 | Issued |
Array
(
[id] => 3970204
[patent_doc_number] => 05991833
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[patent_title] => 'Computer system with bridge logic that reduces interference to CPU cycles during secondary bus transactions'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/022186 | Apparatus for switching a bus power line to a peripheral device to ground in response to a signal indicating single ended configuration of the bus | Feb 10, 1998 | Issued |
Array
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Array
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