Search

Xuan Marian Thai

Examiner (ID: 451)

Most Active Art Unit
3715
Art Unit(s)
2781, 3714, 3713, 3403, 3715, 2181, 2111, 2782
Total Applications
775
Issued Applications
391
Pending Applications
172
Abandoned Applications
214

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3945380 [patent_doc_number] => 05935252 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Apparatus and method for determining and setting system device configuration relating to power and cooling using VPD circuits associated with system devices' [patent_app_type] => 1 [patent_app_number] => 8/912402 [patent_app_country] => US [patent_app_date] => 1997-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 5303 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/935/05935252.pdf [firstpage_image] =>[orig_patent_app_number] => 912402 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/912402
Apparatus and method for determining and setting system device configuration relating to power and cooling using VPD circuits associated with system devices Aug 17, 1997 Issued
Array ( [id] => 3923863 [patent_doc_number] => 05938751 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Bus ring-back and voltage over-shoot reduction techniques coupled with hot-pluggability' [patent_app_type] => 1 [patent_app_number] => 8/912092 [patent_app_country] => US [patent_app_date] => 1997-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6223 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/938/05938751.pdf [firstpage_image] =>[orig_patent_app_number] => 912092 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/912092
Bus ring-back and voltage over-shoot reduction techniques coupled with hot-pluggability Aug 14, 1997 Issued
Array ( [id] => 3770401 [patent_doc_number] => 05820349 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Rotary compressor with reverse rotating braking' [patent_app_type] => 1 [patent_app_number] => 8/910296 [patent_app_country] => US [patent_app_date] => 1997-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3272 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/820/05820349.pdf [firstpage_image] =>[orig_patent_app_number] => 910296 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/910296
Rotary compressor with reverse rotating braking Aug 12, 1997 Issued
Array ( [id] => 4015033 [patent_doc_number] => 05923889 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Technique for setting power saving mode access time in image forming apparatus' [patent_app_type] => 1 [patent_app_number] => 8/910050 [patent_app_country] => US [patent_app_date] => 1997-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2588 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923889.pdf [firstpage_image] =>[orig_patent_app_number] => 910050 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/910050
Technique for setting power saving mode access time in image forming apparatus Aug 11, 1997 Issued
Array ( [id] => 3996279 [patent_doc_number] => 05911078 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-08 [patent_title] => 'Method for multithreaded disk drive operation in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/905889 [patent_app_country] => US [patent_app_date] => 1997-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 9943 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/911/05911078.pdf [firstpage_image] =>[orig_patent_app_number] => 905889 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/905889
Method for multithreaded disk drive operation in a computer system Jul 30, 1997 Issued
Array ( [id] => 4127181 [patent_doc_number] => 06058485 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Method and apparatus for managing power consumption of a digitizing panel' [patent_app_type] => 1 [patent_app_number] => 8/902146 [patent_app_country] => US [patent_app_date] => 1997-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5569 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/058/06058485.pdf [firstpage_image] =>[orig_patent_app_number] => 902146 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/902146
Method and apparatus for managing power consumption of a digitizing panel Jul 28, 1997 Issued
Array ( [id] => 4008546 [patent_doc_number] => 05920726 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'System and method for managing power conditions within a digital camera device' [patent_app_type] => 1 [patent_app_number] => 8/873412 [patent_app_country] => US [patent_app_date] => 1997-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7657 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920726.pdf [firstpage_image] =>[orig_patent_app_number] => 873412 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/873412
System and method for managing power conditions within a digital camera device Jun 11, 1997 Issued
Array ( [id] => 4056940 [patent_doc_number] => 05909561 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-01 [patent_title] => 'Apparatus and method for separately layering cache and architectural specific functions in different operational controllers to facilitate design extension' [patent_app_type] => 1 [patent_app_number] => 8/839443 [patent_app_country] => US [patent_app_date] => 1997-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4548 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/909/05909561.pdf [firstpage_image] =>[orig_patent_app_number] => 839443 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/839443
Apparatus and method for separately layering cache and architectural specific functions in different operational controllers to facilitate design extension Apr 13, 1997 Issued
Array ( [id] => 4160346 [patent_doc_number] => 06061755 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Method of layering cache and architectural specific functions to promote operation symmetry' [patent_app_type] => 1 [patent_app_number] => 8/839441 [patent_app_country] => US [patent_app_date] => 1997-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3625 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/061/06061755.pdf [firstpage_image] =>[orig_patent_app_number] => 839441 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/839441
Method of layering cache and architectural specific functions to promote operation symmetry Apr 13, 1997 Issued
Array ( [id] => 3974366 [patent_doc_number] => 05937172 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Apparatus and method of layering cache and architectural specific functions to permit generic interface definition' [patent_app_type] => 1 [patent_app_number] => 8/839445 [patent_app_country] => US [patent_app_date] => 1997-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3773 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/937/05937172.pdf [firstpage_image] =>[orig_patent_app_number] => 839445 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/839445
Apparatus and method of layering cache and architectural specific functions to permit generic interface definition Apr 13, 1997 Issued
Array ( [id] => 3952345 [patent_doc_number] => 05872984 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-16 [patent_title] => 'Uninterruptible power supply providing continuous power mainstore function for a computer system' [patent_app_type] => 1 [patent_app_number] => 8/831345 [patent_app_country] => US [patent_app_date] => 1997-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2562 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/872/05872984.pdf [firstpage_image] =>[orig_patent_app_number] => 831345 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/831345
Uninterruptible power supply providing continuous power mainstore function for a computer system Mar 31, 1997 Issued
Array ( [id] => 4088380 [patent_doc_number] => 06070206 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Method and apparatus for terminating a bus' [patent_app_type] => 1 [patent_app_number] => 8/829409 [patent_app_country] => US [patent_app_date] => 1997-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6097 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/070/06070206.pdf [firstpage_image] =>[orig_patent_app_number] => 829409 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/829409
Method and apparatus for terminating a bus Mar 30, 1997 Issued
Array ( [id] => 3845956 [patent_doc_number] => 05704767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'Integral pump and flow meter device' [patent_app_type] => 1 [patent_app_number] => 8/808479 [patent_app_country] => US [patent_app_date] => 1997-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3881 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/704/05704767.pdf [firstpage_image] =>[orig_patent_app_number] => 808479 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/808479
Integral pump and flow meter device Mar 2, 1997 Issued
Array ( [id] => 4178757 [patent_doc_number] => 06115767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Apparatus and method of partially transferring data through bus and bus master control device' [patent_app_type] => 1 [patent_app_number] => 8/808017 [patent_app_country] => US [patent_app_date] => 1997-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7073 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115767.pdf [firstpage_image] =>[orig_patent_app_number] => 808017 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/808017
Apparatus and method of partially transferring data through bus and bus master control device Mar 2, 1997 Issued
Array ( [id] => 3970783 [patent_doc_number] => 05999993 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Data transfer system having function of preventing error caused by suspension of data transfer to immediately service transfer interrupted request' [patent_app_type] => 1 [patent_app_number] => 8/808547 [patent_app_country] => US [patent_app_date] => 1997-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6540 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999993.pdf [firstpage_image] =>[orig_patent_app_number] => 808547 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/808547
Data transfer system having function of preventing error caused by suspension of data transfer to immediately service transfer interrupted request Feb 27, 1997 Issued
Array ( [id] => 3974190 [patent_doc_number] => 05901292 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Computer system having expansion unit' [patent_app_type] => 1 [patent_app_number] => 8/808414 [patent_app_country] => US [patent_app_date] => 1997-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6904 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/901/05901292.pdf [firstpage_image] =>[orig_patent_app_number] => 808414 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/808414
Computer system having expansion unit Feb 27, 1997 Issued
Array ( [id] => 3915684 [patent_doc_number] => 05944826 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Integrated circuit layout complete with a bus logic unit connected to a data bus with power reduction circuitry' [patent_app_type] => 1 [patent_app_number] => 8/805067 [patent_app_country] => US [patent_app_date] => 1997-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1421 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/944/05944826.pdf [firstpage_image] =>[orig_patent_app_number] => 805067 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/805067
Integrated circuit layout complete with a bus logic unit connected to a data bus with power reduction circuitry Feb 24, 1997 Issued
Array ( [id] => 3935716 [patent_doc_number] => 05915099 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Bus interface unit in a microprocessor for facilitating internal and external memory accesses' [patent_app_type] => 1 [patent_app_number] => 8/803858 [patent_app_country] => US [patent_app_date] => 1997-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 87 [patent_no_of_words] => 9795 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/915/05915099.pdf [firstpage_image] =>[orig_patent_app_number] => 803858 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/803858
Bus interface unit in a microprocessor for facilitating internal and external memory accesses Feb 20, 1997 Issued
Array ( [id] => 4017863 [patent_doc_number] => 05859986 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Bandwidth efficient method and means for resynchronizing a master and slave over a clocked, arbitrated, bidirectional multistate parallel bus using local data recirculation, wait states, and cycle stealing' [patent_app_type] => 1 [patent_app_number] => 8/803362 [patent_app_country] => US [patent_app_date] => 1997-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5532 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/859/05859986.pdf [firstpage_image] =>[orig_patent_app_number] => 803362 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/803362
Bandwidth efficient method and means for resynchronizing a master and slave over a clocked, arbitrated, bidirectional multistate parallel bus using local data recirculation, wait states, and cycle stealing Feb 19, 1997 Issued
Array ( [id] => 3993203 [patent_doc_number] => 05918058 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Routing of clock signals in a data processing circuit with a power saving mode of operation' [patent_app_type] => 1 [patent_app_number] => 8/804113 [patent_app_country] => US [patent_app_date] => 1997-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5080 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918058.pdf [firstpage_image] =>[orig_patent_app_number] => 804113 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/804113
Routing of clock signals in a data processing circuit with a power saving mode of operation Feb 19, 1997 Issued
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