
Xuxing Chen
Examiner (ID: 17354, Phone: (571)270-3486 , Office: P/2118 )
| Most Active Art Unit | 2187 |
| Art Unit(s) | 2118, 2176, 2115, 2187 |
| Total Applications | 735 |
| Issued Applications | 616 |
| Pending Applications | 45 |
| Abandoned Applications | 91 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11035401
[patent_doc_number] => 20160232357
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-08-11
[patent_title] => 'Secure Boot Sequence for Selectively Disabling Configurable Communication Paths of a Multiprocessor Fabric'
[patent_app_type] => utility
[patent_app_number] => 15/099275
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/099275 | Secure boot sequence for selectively disabling configurable communication paths of a multiprocessor fabric | Apr 13, 2016 | Issued |
Array
(
[id] => 16185778
[patent_doc_number] => 10719107
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-07-21
[patent_title] => Method and apparatus to maintain node power budget for systems that share a power supply
[patent_app_type] => utility
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[patent_app_date] => 2016-03-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/084374 | Method and apparatus to maintain node power budget for systems that share a power supply | Mar 28, 2016 | Issued |
Array
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[patent_doc_number] => 09996143
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[patent_kind] => B2
[patent_issue_date] => 2018-06-12
[patent_title] => Apparatus and method for selectively disabling one or more analog circuits of a processor during a low power state of the processor
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[patent_app_number] => 15/081639
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Array
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[patent_doc_number] => 10768945
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[patent_issue_date] => 2020-09-08
[patent_title] => Semantic weaving of configuration fragments into a consistent configuration
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Array
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[patent_title] => Dynamic link width modulation
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Array
(
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[patent_title] => 'REDUCING POWER CONSUMPTION IN A MULTI-SLICE COMPUTER PROCESSOR'
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Array
(
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[patent_issue_date] => 2018-05-15
[patent_title] => Safe storing data for disaster recovery
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/018964 | Safe storing data for disaster recovery | Feb 8, 2016 | Issued |
Array
(
[id] => 16145027
[patent_doc_number] => 10705583
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[patent_issue_date] => 2020-07-07
[patent_title] => Management of finite electrical cells
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/016307 | Management of finite electrical cells | Feb 4, 2016 | Issued |
Array
(
[id] => 14253829
[patent_doc_number] => 10277127
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[patent_kind] => B2
[patent_issue_date] => 2019-04-30
[patent_title] => Enhanced fault reporting in voltage regulators
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Array
(
[id] => 11501509
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/011948 | Memory system, electric device, and information processing device | Jan 31, 2016 | Issued |
Array
(
[id] => 11501223
[patent_doc_number] => 20170075408
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[patent_title] => 'MANAGING POWER-DOWN MODES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/010237 | Managing power-down modes | Jan 28, 2016 | Issued |
Array
(
[id] => 12932962
[patent_doc_number] => 09830194
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Array
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Array
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Array
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Array
(
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Array
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