Yaima Rigol

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Array ( [id] => 20351386 [patent_doc_number] => 20250348238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => COMBINED MEMORY MODULE LOGIC DEVICES FOR REDUCED COST AND IMPROVED FUNCTIONALITY [patent_app_type] => utility [patent_app_number] => 19/275605 [patent_app_country] => US [patent_app_date] => 2025-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19275605 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20323038 [patent_doc_number] => 20250335126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => ELECTRONIC DEVICE AND METHOD WITH PROCESSING IN MEMORY OPERATION [patent_app_type] => utility [patent_app_number] => 19/060889 [patent_app_country] => US [patent_app_date] => 2025-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2536 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19060889 [rel_patent_id] =>[rel_patent_doc_number] =>)

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