Search

Yaima Rigol

Examiner (ID: 7751, Phone: (571)272-1232 , Office: P/2135 )

Most Active Art Unit
2135
Art Unit(s)
2185, 2135
Total Applications
751
Issued Applications
541
Pending Applications
47
Abandoned Applications
176

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19420004 [patent_doc_number] => 20240296127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => NAMESPACE MAPPING STRUCTURAL ADJUSTMENT IN NON-VOLATILE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/659331 [patent_app_country] => US [patent_app_date] => 2024-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20661 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18659331 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/659331
NAMESPACE MAPPING STRUCTURAL ADJUSTMENT IN NON-VOLATILE MEMORY DEVICES May 8, 2024 Pending
Array ( [id] => 20215117 [patent_doc_number] => 12411770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Hybrid parallel programming of single-level cell memory [patent_app_type] => utility [patent_app_number] => 18/649582 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5727 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649582 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/649582
Hybrid parallel programming of single-level cell memory Apr 28, 2024 Issued
Array ( [id] => 19383148 [patent_doc_number] => 20240273018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => MULTI-RING SHARED, TRAVERSABLE, AND DYNAMIC ADVANCED DATABASE [patent_app_type] => utility [patent_app_number] => 18/644694 [patent_app_country] => US [patent_app_date] => 2024-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644694 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/644694
Multi-ring shared, traversable, and dynamic advanced database Apr 23, 2024 Issued
Array ( [id] => 20296648 [patent_doc_number] => 20250321891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => Far Memory Telemetry For Hot And Cold Page Management [patent_app_type] => utility [patent_app_number] => 18/636879 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18636879 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/636879
Far Memory Telemetry For Hot And Cold Page Management Apr 15, 2024 Pending
Array ( [id] => 20883604 [patent_doc_number] => 12699647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-04 [patent_title] => Processing unmap commands in memory systems [patent_app_type] => utility [patent_app_number] => 18/635925 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3898 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635925 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635925
PROCESSING UNMAP COMMANDS IN MEMORY SYSTEMS Apr 14, 2024 Pending
Array ( [id] => 19434500 [patent_doc_number] => 20240302998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => MANAGING ADDRESS ACCESS INFORMATION [patent_app_type] => utility [patent_app_number] => 18/608591 [patent_app_country] => US [patent_app_date] => 2024-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608591 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/608591
MANAGING ADDRESS ACCESS INFORMATION Mar 17, 2024 Pending
Array ( [id] => 19267710 [patent_doc_number] => 20240211413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => Streaming Transfers and Ordering Model [patent_app_type] => utility [patent_app_number] => 18/596835 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18596835 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/596835
Streaming transfers and ordering model Mar 5, 2024 Issued
Array ( [id] => 20388201 [patent_doc_number] => 12487927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Remote cache invalidation [patent_app_type] => utility [patent_app_number] => 18/582305 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6531 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582305 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/582305
Remote cache invalidation Feb 19, 2024 Issued
Array ( [id] => 20673147 [patent_doc_number] => 12613658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-28 [patent_title] => Early read start time for random access SSDs [patent_app_type] => utility [patent_app_number] => 18/443975 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443975 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443975
Early read start time for random access SSDs Feb 15, 2024 Issued
Array ( [id] => 20481825 [patent_doc_number] => 12530300 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Memory side cache request handling [patent_app_type] => utility [patent_app_number] => 18/428930 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8286 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428930 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/428930
Memory side cache request handling Jan 30, 2024 Issued
Array ( [id] => 20716940 [patent_doc_number] => 12632190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Achieving uniform bandwidth using blended memory blocks for relocation operations [patent_app_type] => utility [patent_app_number] => 18/426768 [patent_app_country] => US [patent_app_date] => 2024-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5871 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18426768 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/426768
Achieving uniform bandwidth using blended memory blocks for relocation operations Jan 29, 2024 Issued
Array ( [id] => 20138113 [patent_doc_number] => 20250245157 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => PREFETCH TRAINING CIRCUITRY [patent_app_type] => utility [patent_app_number] => 18/423883 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18423883 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/423883
Prefetch training circuitry Jan 25, 2024 Issued
Array ( [id] => 19219766 [patent_doc_number] => 20240184470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => COMPOSITE AGGREGATE ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 18/419276 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419276 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419276
Composite aggregate architecture Jan 21, 2024 Issued
Array ( [id] => 20087356 [patent_doc_number] => 20250217292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => Adaptive System Probe Action to Minimize Input/Output Dirty Data Transfers [patent_app_type] => utility [patent_app_number] => 18/399283 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2266 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399283 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399283
Adaptive system probe action to minimize input/output dirty data transfers Dec 27, 2023 Issued
Array ( [id] => 19248085 [patent_doc_number] => 20240199070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => METHOD FOR OPERATING A DATA PROCESSING SYSTEM [patent_app_type] => utility [patent_app_number] => 18/540099 [patent_app_country] => US [patent_app_date] => 2023-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14696 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18540099 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/540099
METHOD FOR OPERATING A DATA PROCESSING SYSTEM Dec 13, 2023 Pending
Array ( [id] => 20052141 [patent_doc_number] => 20250190363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => ACCESS STATE FOR PAGE TABLE ENTRIES [patent_app_type] => utility [patent_app_number] => 18/536394 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536394 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/536394
Access state for page table entries Dec 11, 2023 Issued
Array ( [id] => 19114707 [patent_doc_number] => 20240126457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => Dynamic Allocation of Cache Memory as RAM [patent_app_type] => utility [patent_app_number] => 18/535697 [patent_app_country] => US [patent_app_date] => 2023-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18535697 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/535697
Dynamic Allocation of Cache Memory as RAM Dec 10, 2023 Pending
Array ( [id] => 20481814 [patent_doc_number] => 12530289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Memory die with on-chip binary vector database search [patent_app_type] => utility [patent_app_number] => 18/526821 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 12734 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526821 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/526821
Memory die with on-chip binary vector database search Nov 30, 2023 Issued
Array ( [id] => 19036500 [patent_doc_number] => 20240086315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => MEMORY ACCESS STATISTICS MONITORING [patent_app_type] => utility [patent_app_number] => 18/512850 [patent_app_country] => US [patent_app_date] => 2023-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18512850 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/512850
Memory access statistics monitoring Nov 16, 2023 Issued
Array ( [id] => 19740109 [patent_doc_number] => 12216944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Sub-cluster recovery using a partition group index [patent_app_type] => utility [patent_app_number] => 18/482541 [patent_app_country] => US [patent_app_date] => 2023-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4154 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482541 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/482541
Sub-cluster recovery using a partition group index Oct 5, 2023 Issued
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