
Yelena Rossoshek
Examiner (ID: 11381)
| Most Active Art Unit | 2851 |
| Art Unit(s) | 2851, 2825 |
| Total Applications | 1218 |
| Issued Applications | 1046 |
| Pending Applications | 23 |
| Abandoned Applications | 152 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5746666
[patent_doc_number] => 20060109596
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-25
[patent_title] => 'Electrostatic discharge testing method and semiconductor device fabrication method'
[patent_app_type] => utility
[patent_app_number] => 11/243355
[patent_app_country] => US
[patent_app_date] => 2005-10-03
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[pdf_file] => publications/A1/0109/20060109596.pdf
[firstpage_image] =>[orig_patent_app_number] => 11243355
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/243355 | Electrostatic discharge testing method and semiconductor device fabrication method | Oct 2, 2005 | Issued |
Array
(
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[patent_doc_number] => 20070094959
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[patent_issue_date] => 2007-05-03
[patent_title] => 'Phase-shifting masks with sub-wavelength diffractive optical elements'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/242165 | Phase-shifting masks with sub-wavelength diffractive optical elements | Sep 29, 2005 | Issued |
Array
(
[id] => 108165
[patent_doc_number] => 07725865
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[patent_kind] => B2
[patent_issue_date] => 2010-05-25
[patent_title] => 'Method, storage media storing program, and component for avoiding increase in delay time in semiconductor circuit having plural wiring layers'
[patent_app_type] => utility
[patent_app_number] => 11/236532
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[patent_app_date] => 2005-09-28
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[pdf_file] => patents/07/725/07725865.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/236532 | Method, storage media storing program, and component for avoiding increase in delay time in semiconductor circuit having plural wiring layers | Sep 27, 2005 | Issued |
Array
(
[id] => 362963
[patent_doc_number] => 07487481
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-03
[patent_title] => 'Receiver circuit for on chip timing adjustment'
[patent_app_type] => utility
[patent_app_number] => 11/232675
[patent_app_country] => US
[patent_app_date] => 2005-09-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/232675 | Receiver circuit for on chip timing adjustment | Sep 21, 2005 | Issued |
Array
(
[id] => 4743738
[patent_doc_number] => 20080088339
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[patent_issue_date] => 2008-04-17
[patent_title] => 'Hard Macro with Configurable Side Input/Output Terminals, for a Subsystem'
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[patent_app_number] => 11/576685
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/576685 | Hard macro with configurable side input/output terminals, for a subsystem | Sep 20, 2005 | Issued |
Array
(
[id] => 7589599
[patent_doc_number] => 07665054
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[patent_issue_date] => 2010-02-16
[patent_title] => 'Optimizing circuit layouts by configuring rooms for placing devices'
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Array
(
[id] => 298004
[patent_doc_number] => 07543249
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[patent_issue_date] => 2009-06-02
[patent_title] => 'Embedded switchable power ring'
[patent_app_type] => utility
[patent_app_number] => 11/230085
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/230085 | Embedded switchable power ring | Sep 18, 2005 | Issued |
Array
(
[id] => 201063
[patent_doc_number] => 07640526
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-12-29
[patent_title] => 'Modular partial reconfiguration'
[patent_app_type] => utility
[patent_app_number] => 11/225225
[patent_app_country] => US
[patent_app_date] => 2005-09-12
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/640/07640526.pdf
[firstpage_image] =>[orig_patent_app_number] => 11225225
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/225225 | Modular partial reconfiguration | Sep 11, 2005 | Issued |
Array
(
[id] => 5898329
[patent_doc_number] => 20060043562
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[patent_issue_date] => 2006-03-02
[patent_title] => 'Circuit device and manufacture method for circuit device'
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[firstpage_image] =>[orig_patent_app_number] => 11212655
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/212655 | Circuit device and manufacture method for circuit device | Aug 28, 2005 | Abandoned |
Array
(
[id] => 5627177
[patent_doc_number] => 20060265682
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[patent_title] => 'Manufacturing aware design and design aware manufacturing'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/214472 | Manufacturing aware design and design aware manufacturing | Aug 27, 2005 | Issued |
Array
(
[id] => 333386
[patent_doc_number] => 07512918
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[patent_title] => 'Multimode delay analysis for simplifying integrated circuit design timing models'
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Array
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[patent_title] => 'PLD architecture for flexible placement of IP functions blocks'
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Array
(
[id] => 801767
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[patent_title] => 'Auto-generation and placement of arbitration logic in a multi-master multi-slave embedded system'
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Array
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Array
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Array
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Array
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Array
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