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Young Whang

Examiner (ID: 5243)

Most Active Art Unit
2103
Art Unit(s)
2103
Total Applications
382
Issued Applications
354
Pending Applications
5
Abandoned Applications
23

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17846805 [patent_doc_number] => 11436178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Semiconductor device and method for controlling plural chips [patent_app_type] => utility [patent_app_number] => 17/198438 [patent_app_country] => US [patent_app_date] => 2021-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 22702 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17198438 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/198438
Semiconductor device and method for controlling plural chips Mar 10, 2021 Issued
Array ( [id] => 19640437 [patent_doc_number] => 12171061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-17 [patent_title] => Semiconductor apparatus with inspection terminals [patent_app_type] => utility [patent_app_number] => 17/184681 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 15569 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184681 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/184681
Semiconductor apparatus with inspection terminals Feb 24, 2021 Issued
Array ( [id] => 17557979 [patent_doc_number] => 11314685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Low noise serial interfaces with gated clock [patent_app_type] => utility [patent_app_number] => 17/249108 [patent_app_country] => US [patent_app_date] => 2021-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13230 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17249108 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/249108
Low noise serial interfaces with gated clock Feb 18, 2021 Issued
Array ( [id] => 17722262 [patent_doc_number] => 20220214984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => INTERRUPT REQUEST PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 17/143183 [patent_app_country] => US [patent_app_date] => 2021-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17143183 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/143183
Interrupt request processing device Jan 6, 2021 Issued
Array ( [id] => 17706965 [patent_doc_number] => 20220206971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => INTERRUPT AND EXCEPTION CLUSTERING IN A PROCESSOR USING MEMBERSHIP GROUPS [patent_app_type] => utility [patent_app_number] => 17/133942 [patent_app_country] => US [patent_app_date] => 2020-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17234 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17133942 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/133942
INTERRUPT AND EXCEPTION CLUSTERING IN A PROCESSOR USING MEMBERSHIP GROUPS Dec 23, 2020 Abandoned
Array ( [id] => 17706966 [patent_doc_number] => 20220206972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => INTERRUPT AND EXCEPTION CLUSTERING IN A PROCESSOR USING EXTERNAL EVENT GROUPS [patent_app_type] => utility [patent_app_number] => 17/133943 [patent_app_country] => US [patent_app_date] => 2020-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17133943 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/133943
INTERRUPT AND EXCEPTION CLUSTERING IN A PROCESSOR USING EXTERNAL EVENT GROUPS Dec 23, 2020 Abandoned
Array ( [id] => 19625633 [patent_doc_number] => 12164462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Micro-network-on-chip and microsector infrastructure [patent_app_type] => utility [patent_app_number] => 17/132663 [patent_app_country] => US [patent_app_date] => 2020-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 20907 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17132663 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/132663
Micro-network-on-chip and microsector infrastructure Dec 22, 2020 Issued
Array ( [id] => 17294234 [patent_doc_number] => 20210390073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => ELECTRONIC DEVICE, INFORMATION PROCESSING SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 17/120559 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17120559 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/120559
Electronic device, determine a setting of a host device for communication in a subsequent phase Dec 13, 2020 Issued
Array ( [id] => 17515696 [patent_doc_number] => 11294847 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-04-05 [patent_title] => Fibre channel host onboarding system [patent_app_type] => utility [patent_app_number] => 17/107322 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8859 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107322 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107322
Fibre channel host onboarding system Nov 29, 2020 Issued
Array ( [id] => 16872285 [patent_doc_number] => 20210165752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => ELECTRONIC DEVICE, INTERRUPT CONFIGURATION CONTROL METHOD, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/104409 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17104409 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/104409
Electronic device, interrupt configuration control method, and storage medium Nov 24, 2020 Issued
Array ( [id] => 17565255 [patent_doc_number] => 20220129404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => PIN CONNECTION PROTOCOL UPDATING [patent_app_type] => utility [patent_app_number] => 17/077993 [patent_app_country] => US [patent_app_date] => 2020-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6731 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17077993 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/077993
Pin connection protocol updating Oct 21, 2020 Issued
Array ( [id] => 17550268 [patent_doc_number] => 20220121610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => INITIALIZATION SEQUENCING OF CHIPLET I/O CHANNELS WITHIN A CHIPLET SYSTEM [patent_app_type] => utility [patent_app_number] => 17/075153 [patent_app_country] => US [patent_app_date] => 2020-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9907 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17075153 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/075153
Initialization sequencing of chiplet I/O channels within a chiplet system Oct 19, 2020 Issued
Array ( [id] => 17550269 [patent_doc_number] => 20220121611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => SECONDARY DEVICE DETECTION USING A SYNCHRONOUS INTERFACE [patent_app_type] => utility [patent_app_number] => 17/074852 [patent_app_country] => US [patent_app_date] => 2020-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/074852
Secondary device detection using a synchronous interface Oct 19, 2020 Issued
Array ( [id] => 16857019 [patent_doc_number] => 20210157764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => DATA CONVERSION DEVICE AND DATA CONVERSION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/067859 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17067859 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/067859
DATA CONVERSION DEVICE AND DATA CONVERSION SYSTEM Oct 11, 2020 Abandoned
Array ( [id] => 16623600 [patent_doc_number] => 20210042253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => DYNAMIC TIMING CALIBRATION SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 17/068766 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17068766 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/068766
Dynamic timing calibration systems and methods Oct 11, 2020 Issued
Array ( [id] => 17907401 [patent_doc_number] => 11461255 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Electronic device, network switch, and interrupt transmitting and receiving method [patent_app_type] => utility [patent_app_number] => 17/063745 [patent_app_country] => US [patent_app_date] => 2020-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3495 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17063745 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/063745
Electronic device, network switch, and interrupt transmitting and receiving method Oct 5, 2020 Issued
Array ( [id] => 16556022 [patent_doc_number] => 20210001170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => APPARATUS FOR NATURAL TORSO AND LIMBS TRACKING AND FEEDBACK FOR ELECTRONIC INTERACTION [patent_app_type] => utility [patent_app_number] => 17/030195 [patent_app_country] => US [patent_app_date] => 2020-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17030195 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/030195
APPARATUS FOR NATURAL TORSO AND LIMBS TRACKING AND FEEDBACK FOR ELECTRONIC INTERACTION Sep 22, 2020 Abandoned
Array ( [id] => 16556023 [patent_doc_number] => 20210001171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => SYSTEM AND METHOD FOR EVALUATION, DETECTION, CONDITIONING, AND TREATMENT OF NEUROLOGICAL FUNCTIONING AND CONDITIONS [patent_app_type] => utility [patent_app_number] => 17/030233 [patent_app_country] => US [patent_app_date] => 2020-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23609 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17030233 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/030233
System and method for evaluation, detection, conditioning, and treatment of neurological functioning and conditions Sep 22, 2020 Issued
Array ( [id] => 16722342 [patent_doc_number] => 20210089489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => CAN BUS DRIVER WITH ACCELERATED STATE TRANSITIONS [patent_app_type] => utility [patent_app_number] => 17/027899 [patent_app_country] => US [patent_app_date] => 2020-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11549 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17027899 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/027899
CAN bus driver with accelerated state transitions Sep 21, 2020 Issued
Array ( [id] => 17515693 [patent_doc_number] => 11294844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => EtherCAT master-slave station integrated bridge controller and control method thereof [patent_app_type] => utility [patent_app_number] => 17/010065 [patent_app_country] => US [patent_app_date] => 2020-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5531 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17010065 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/010065
EtherCAT master-slave station integrated bridge controller and control method thereof Sep 1, 2020 Issued
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