Younghuie Jessica Han

Array ( [id] => 13906335 [patent_doc_number] => 20190042372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => METHOD AND APPARATUS TO RECOVER DATA STORED IN PERSISTENT MEMORY IN A FAILED NODE OF A COMPUTER CLUSTER [patent_app_type] => utility [patent_app_number] => 16/012525 [patent_app_country] => US [patent_app_date] => 2018-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4848 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16012525 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15516621 [patent_doc_number] => 10564895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-18 [patent_title] => I/O performance enhancement of solid-state data storage devices [patent_app_type] => utility [patent_app_number] => 15/977275 [patent_app_country] => US [patent_app_date] => 2018-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15977275 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13390485 [patent_doc_number] => 20180246785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => USING GEOGRAPHICAL LOCATION INFORMATION TO PROVISION MULTIPLE TARGET STORAGES FOR A SOURCE DEVICE [patent_app_type] => utility [patent_app_number] => 15/964062 [patent_app_country] => US [patent_app_date] => 2018-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7740 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15964062 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13905875 [patent_doc_number] => 20190042142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => STATISTICS AND PRIORITY-BASED CONTROL FOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 15/857954 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6733 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857954 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13580077 [patent_doc_number] => 20180341587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => DUAL CLUSTERS OF FULLY CONNECTED INTEGRATED CIRCUIT MULTIPROCESSORS WITH SHARED HIGH-LEVEL CACHE [patent_app_type] => utility [patent_app_number] => 15/800369 [patent_app_country] => US [patent_app_date] => 2017-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15800369 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13752575 [patent_doc_number] => 10169234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Translation lookaside buffer purging with concurrent cache updates [patent_app_type] => utility [patent_app_number] => 15/790387 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 10976 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15790387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12025637 [patent_doc_number] => 20170315736 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'Segmenting Read Requests and Interleaving Segmented Read and Write Requests to Reduce Latency and Maximize Throughput in a Flash Storage Device' [patent_app_type] => utility [patent_app_number] => 15/654495 [patent_app_country] => US [patent_app_date] => 2017-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8710 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15654495 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12025657 [patent_doc_number] => 20170315756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'DATA MANAGEMENT FOR A DATA STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 15/651560 [patent_app_country] => US [patent_app_date] => 2017-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8004 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15651560 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12756157 [patent_doc_number] => 20180143886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => Method for Rebuilding a Mapping Table of a Solid State Disk [patent_app_type] => utility [patent_app_number] => 15/638389 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4103 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15638389 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13752573 [patent_doc_number] => 10169233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Translation lookaside buffer purging with concurrent cache updates [patent_app_type] => utility [patent_app_number] => 15/613530 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 10976 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13767411 [patent_doc_number] => 10176047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-08 [patent_title] => Using geographical location information to provision multiple target storages for a source device [patent_app_type] => utility [patent_app_number] => 15/611729 [patent_app_country] => US [patent_app_date] => 2017-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7740 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15611729 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13580075 [patent_doc_number] => 20180341586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => DUAL CLUSTERS OF FULLY CONNECTED INTEGRATED CIRCUIT MULTIPROCESSORS WITH SHARED HIGH-LEVEL CACHE [patent_app_type] => utility [patent_app_number] => 15/606055 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6085 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15606055 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14298873 [patent_doc_number] => 10289563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-14 [patent_title] => Efficient reclamation of pre-allocated direct memory access (DMA) memory [patent_app_type] => utility [patent_app_number] => 15/407368 [patent_app_country] => US [patent_app_date] => 2017-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6810 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15407368 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11544067 [patent_doc_number] => 20170097892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-06 [patent_title] => 'PAGE TABLE INCLUDING DATA FETCH WIDTH INDICATOR' [patent_app_type] => utility [patent_app_number] => 15/383306 [patent_app_country] => US [patent_app_date] => 2016-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10236 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15383306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11709009 [patent_doc_number] => 20170177508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'INFORMATION PROCESSING APPARATUS AND SHARED-MEMORY MANAGEMENT METHOD' [patent_app_type] => utility [patent_app_number] => 15/341042 [patent_app_country] => US [patent_app_date] => 2016-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8465 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15341042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15197633 [patent_doc_number] => 10496308 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-03 [patent_title] => Using pseudo DSN memory units to handle data in motion within a DSN memory [patent_app_type] => utility [patent_app_number] => 15/340310 [patent_app_country] => US [patent_app_date] => 2016-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 391 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15340310 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12687877 [patent_doc_number] => 20180121125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => METHOD AND APPARATUS FOR MANAGING RESOURCE ACCESS CONTROL HARDWARE IN A SYSTEM-ON-CHIP DEVICE [patent_app_type] => utility [patent_app_number] => 15/340895 [patent_app_country] => US [patent_app_date] => 2016-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15340895 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11403611 [patent_doc_number] => 20170024149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'INTERLEAVING READ AND WRITE REQUESTS TO REDUCE LATENCY AND MAXIMIZE THROUGHPUT IN A FLASH STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 15/284808 [patent_app_country] => US [patent_app_date] => 2016-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8660 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15284808 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14560395 [patent_doc_number] => 10348675 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-09 [patent_title] => Distributed management of a storage system [patent_app_type] => utility [patent_app_number] => 15/254293 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7689 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15254293 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11403791 [patent_doc_number] => 20170024329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'ARITHMETIC PROCESSING DEVICE AND ARITHMETIC PROCESSING DEVICE CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 15/193164 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 12468 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15193164 [rel_patent_id] =>[rel_patent_doc_number] =>)