
Yu Chen
Examiner (ID: 574, Phone: (571)270-7881 , Office: P/2815 )
| Most Active Art Unit | 2613 |
| Art Unit(s) | 2896, 2815, 2613 |
| Total Applications | 1252 |
| Issued Applications | 745 |
| Pending Applications | 201 |
| Abandoned Applications | 358 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17371930
[patent_doc_number] => 20220026982
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-27
[patent_title] => VIRTUAL REALITY DISPLAY METHOD, DEVICE AND APPARATUS, AND COMPUTER STORAGE MEDIUM
[patent_app_type] => utility
[patent_app_number] => 17/311393
[patent_app_country] => US
[patent_app_date] => 2019-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7391
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17311393
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/311393 | Virtual reality display method, device and apparatus, and computer storage medium | Dec 15, 2019 | Issued |
Array
(
[id] => 20134032
[patent_doc_number] => 12376363
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-29
[patent_title] => Gate stacks for stack-fin channel I/O devices and nanowire channel core devices
[patent_app_type] => utility
[patent_app_number] => 16/713986
[patent_app_country] => US
[patent_app_date] => 2019-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 44
[patent_no_of_words] => 5296
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16713986
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/713986 | Gate stacks for stack-fin channel I/O devices and nanowire channel core devices | Dec 12, 2019 | Issued |
Array
(
[id] => 15744711
[patent_doc_number] => 20200111245
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-09
[patent_title] => Print Data Edit Apparatus and Recording Medium
[patent_app_type] => utility
[patent_app_number] => 16/706316
[patent_app_country] => US
[patent_app_date] => 2019-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6745
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16706316
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/706316 | Print data edit apparatus and recording medium | Dec 5, 2019 | Issued |
Array
(
[id] => 17360083
[patent_doc_number] => 20220020879
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-20
[patent_title] => SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/297554
[patent_app_country] => US
[patent_app_date] => 2019-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9316
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17297554
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/297554 | SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | Nov 27, 2019 | Abandoned |
Array
(
[id] => 15657481
[patent_doc_number] => 20200091271
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-19
[patent_title] => LIGHT-EMITTING DEVICE COMPRISING FLEXIBLE SUBSTRATE AND LIGHT-EMITTING ELEMENT
[patent_app_type] => utility
[patent_app_number] => 16/686254
[patent_app_country] => US
[patent_app_date] => 2019-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17411
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 23
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16686254
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/686254 | Light-emitting device comprising flexible substrate and light-emitting element | Nov 17, 2019 | Issued |
Array
(
[id] => 16849986
[patent_doc_number] => 20210150731
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-20
[patent_title] => INTERACTIVE BODY-DRIVEN GRAPHICS FOR LIVE VIDEO PERFORMANCE
[patent_app_type] => utility
[patent_app_number] => 16/683665
[patent_app_country] => US
[patent_app_date] => 2019-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9794
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683665
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/683665 | Interactive body-driven graphics for live video performance | Nov 13, 2019 | Issued |
Array
(
[id] => 18001070
[patent_doc_number] => 11502181
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-15
[patent_title] => Semiconductor device and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 16/678231
[patent_app_country] => US
[patent_app_date] => 2019-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 9181
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678231
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/678231 | Semiconductor device and method for fabricating the same | Nov 7, 2019 | Issued |
Array
(
[id] => 17395478
[patent_doc_number] => 11244494
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-02-08
[patent_title] => Multi-channel ray casting with distortion meshes to address chromatic aberration
[patent_app_type] => utility
[patent_app_number] => 16/668650
[patent_app_country] => US
[patent_app_date] => 2019-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 16574
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 219
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16668650
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/668650 | Multi-channel ray casting with distortion meshes to address chromatic aberration | Oct 29, 2019 | Issued |
Array
(
[id] => 16796129
[patent_doc_number] => 20210125946
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-29
[patent_title] => ELECTRONIC DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/663082
[patent_app_country] => US
[patent_app_date] => 2019-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3821
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16663082
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/663082 | ELECTRONIC DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME | Oct 23, 2019 | Abandoned |
Array
(
[id] => 16796148
[patent_doc_number] => 20210125965
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-29
[patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/663084
[patent_app_country] => US
[patent_app_date] => 2019-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6960
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16663084
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/663084 | SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME | Oct 23, 2019 | Abandoned |
Array
(
[id] => 16796142
[patent_doc_number] => 20210125959
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-29
[patent_title] => METAL-COVERED CHIP SCALE PACKAGES
[patent_app_type] => utility
[patent_app_number] => 16/663089
[patent_app_country] => US
[patent_app_date] => 2019-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4245
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16663089
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/663089 | METAL-COVERED CHIP SCALE PACKAGES | Oct 23, 2019 | Pending |
Array
(
[id] => 15969553
[patent_doc_number] => 20200168528
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-28
[patent_title] => STACKED-DEVICE THROUGH-SILICON VIAS FOR SEMICONDUCTOR PACKAGES
[patent_app_type] => utility
[patent_app_number] => 16/663001
[patent_app_country] => US
[patent_app_date] => 2019-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8041
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16663001
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/663001 | STACKED-DEVICE THROUGH-SILICON VIAS FOR SEMICONDUCTOR PACKAGES | Oct 23, 2019 | Abandoned |
Array
(
[id] => 15969573
[patent_doc_number] => 20200168538
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-28
[patent_title] => MULTIPLE-SURFACE CONNECTED EMBEDDED INTERCONNECT BRIDGE FOR SEMICONDUCTOR PACKAGE SUBSTRATES
[patent_app_type] => utility
[patent_app_number] => 16/662990
[patent_app_country] => US
[patent_app_date] => 2019-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8055
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16662990
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/662990 | MULTIPLE-SURFACE CONNECTED EMBEDDED INTERCONNECT BRIDGE FOR SEMICONDUCTOR PACKAGE SUBSTRATES | Oct 23, 2019 | Abandoned |
Array
(
[id] => 16796088
[patent_doc_number] => 20210125905
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-29
[patent_title] => WIRING STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/663087
[patent_app_country] => US
[patent_app_date] => 2019-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8138
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16663087
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/663087 | WIRING STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | Oct 23, 2019 | Abandoned |
Array
(
[id] => 15938371
[patent_doc_number] => 20200160819
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-21
[patent_title] => ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION
[patent_app_type] => utility
[patent_app_number] => 16/658793
[patent_app_country] => US
[patent_app_date] => 2019-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 28400
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16658793
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/658793 | Adaptive multibit bus for energy optimization | Oct 20, 2019 | Issued |
Array
(
[id] => 16765481
[patent_doc_number] => 20210111063
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-15
[patent_title] => MULTI-DEPTH REGIONS OF HIGH RESISTIVITY IN A SEMICONDUCTOR SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 16/598064
[patent_app_country] => US
[patent_app_date] => 2019-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4927
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16598064
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/598064 | Multi-depth regions of high resistivity in a semiconductor substrate | Oct 9, 2019 | Issued |
Array
(
[id] => 17638265
[patent_doc_number] => 11349001
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-31
[patent_title] => Replacement gate cross-couple for static random-access memory scaling
[patent_app_type] => utility
[patent_app_number] => 16/598065
[patent_app_country] => US
[patent_app_date] => 2019-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 20
[patent_no_of_words] => 5775
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16598065
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/598065 | Replacement gate cross-couple for static random-access memory scaling | Oct 9, 2019 | Issued |
Array
(
[id] => 17395835
[patent_doc_number] => 11244859
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-08
[patent_title] => Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line
[patent_app_type] => utility
[patent_app_number] => 16/597966
[patent_app_country] => US
[patent_app_date] => 2019-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7480
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16597966
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/597966 | Interconnects having a via-to-line spacer for preventing short circuit events between a conductive via and an adjacent line | Oct 9, 2019 | Issued |
Array
(
[id] => 16765736
[patent_doc_number] => 20210111318
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-15
[patent_title] => UV LED PACKAGE
[patent_app_type] => utility
[patent_app_number] => 16/598061
[patent_app_country] => US
[patent_app_date] => 2019-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2313
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16598061
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/598061 | UV LED PACKAGE | Oct 9, 2019 | Abandoned |
Array
(
[id] => 17152016
[patent_doc_number] => 11145097
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-12
[patent_title] => Changing view order of augmented reality objects based on user gaze
[patent_app_type] => utility
[patent_app_number] => 16/589190
[patent_app_country] => US
[patent_app_date] => 2019-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7230
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16589190
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/589190 | Changing view order of augmented reality objects based on user gaze | Sep 30, 2019 | Issued |