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Yubin Hung

Examiner (ID: 17121, Phone: (571)272-7451 , Office: P/2666 )

Most Active Art Unit
2666
Art Unit(s)
2662, 2625, 2624, 2667, 2666, 2672
Total Applications
969
Issued Applications
708
Pending Applications
18
Abandoned Applications
247

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 245069 [patent_doc_number] => 07590813 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-09-15 [patent_title] => 'Cache scanning system and method' [patent_app_type] => utility [patent_app_number] => 10/914962 [patent_app_country] => US [patent_app_date] => 2004-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4710 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/590/07590813.pdf [firstpage_image] =>[orig_patent_app_number] => 10914962 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/914962
Cache scanning system and method Aug 8, 2004 Issued
Array ( [id] => 868739 [patent_doc_number] => 07370153 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-05-06 [patent_title] => 'System and method of pre-fetching using an extended data structure including required data and a pre-fetch flag' [patent_app_type] => utility [patent_app_number] => 10/912822 [patent_app_country] => US [patent_app_date] => 2004-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3140 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/370/07370153.pdf [firstpage_image] =>[orig_patent_app_number] => 10912822 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/912822
System and method of pre-fetching using an extended data structure including required data and a pre-fetch flag Aug 5, 2004 Issued
Array ( [id] => 414743 [patent_doc_number] => 07284096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-16 [patent_title] => 'Systems and methods for data caching' [patent_app_type] => utility [patent_app_number] => 10/911716 [patent_app_country] => US [patent_app_date] => 2004-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4102 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/284/07284096.pdf [firstpage_image] =>[orig_patent_app_number] => 10911716 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/911716
Systems and methods for data caching Aug 4, 2004 Issued
Array ( [id] => 7032315 [patent_doc_number] => 20050030824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Apparatus and method for controlling the access operation by a plurality of data processing devices to a memory' [patent_app_type] => utility [patent_app_number] => 10/911319 [patent_app_country] => US [patent_app_date] => 2004-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3299 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20050030824.pdf [firstpage_image] =>[orig_patent_app_number] => 10911319 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/911319
Apparatus and method for controlling the access operation by a plurality of data processing devices to a memory Aug 3, 2004 Issued
Array ( [id] => 451101 [patent_doc_number] => 07254689 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-08-07 [patent_title] => 'Decompression of block-sorted data' [patent_app_type] => utility [patent_app_number] => 10/892988 [patent_app_country] => US [patent_app_date] => 2004-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4069 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/254/07254689.pdf [firstpage_image] =>[orig_patent_app_number] => 10892988 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/892988
Decompression of block-sorted data Jul 14, 2004 Issued
Array ( [id] => 5896423 [patent_doc_number] => 20060004962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Cache memory system and method capable of adaptively accommodating various memory line sizes' [patent_app_type] => utility [patent_app_number] => 10/883860 [patent_app_country] => US [patent_app_date] => 2004-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9568 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20060004962.pdf [firstpage_image] =>[orig_patent_app_number] => 10883860 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883860
Cache memory system and method capable of adaptively accommodating various memory line sizes Jul 1, 2004 Issued
Array ( [id] => 5896530 [patent_doc_number] => 20060005069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Method and system for increasing data storage reliability and efficiency via compression' [patent_app_type] => utility [patent_app_number] => 10/883236 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7228 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20060005069.pdf [firstpage_image] =>[orig_patent_app_number] => 10883236 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/883236
Method and system for increasing data storage reliability and efficiency via compression Jun 30, 2004 Issued
Array ( [id] => 6946600 [patent_doc_number] => 20050198437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => 'Method and system for coalescing coherence messages' [patent_app_type] => utility [patent_app_number] => 10/796520 [patent_app_country] => US [patent_app_date] => 2004-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1648 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20050198437.pdf [firstpage_image] =>[orig_patent_app_number] => 10796520 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/796520
Method and system for coalescing coherence messages Mar 7, 2004 Abandoned
Array ( [id] => 7456620 [patent_doc_number] => 20040186921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-23 [patent_title] => 'Memory mapping in a multi-engine processor' [patent_app_type] => new [patent_app_number] => 10/780330 [patent_app_country] => US [patent_app_date] => 2004-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4236 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20040186921.pdf [firstpage_image] =>[orig_patent_app_number] => 10780330 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/780330
Memory mapping in a processor having multiple programmable units Feb 16, 2004 Issued
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