
Yu-hsi David Sun
Examiner (ID: 2413, Phone: (571)270-5773 , Office: P/2895 )
| Most Active Art Unit | 2895 |
| Art Unit(s) | 4183, 2895, 2817 |
| Total Applications | 1172 |
| Issued Applications | 906 |
| Pending Applications | 81 |
| Abandoned Applications | 211 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19926218
[patent_doc_number] => 12300511
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2025-05-13
[patent_title] => Fabrication method for package structure
[patent_app_type] => utility
[patent_app_number] => 19/021887
[patent_app_country] => US
[patent_app_date] => 2025-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 0
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19021887
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/021887 | Fabrication method for package structure | Jan 14, 2025 | Issued |
Array
(
[id] => 19546555
[patent_doc_number] => 20240363591
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => INTEGRATED CIRCUIT PACKAGE AND METHOD
[patent_app_type] => utility
[patent_app_number] => 18/767600
[patent_app_country] => US
[patent_app_date] => 2024-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9106
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18767600
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/767600 | INTEGRATED CIRCUIT PACKAGE AND METHOD | Jul 8, 2024 | Pending |
Array
(
[id] => 19664064
[patent_doc_number] => 20240431129
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => DISPLAY DEVICE, DISPLAY MODULE, ELECTRONIC DEVICE, AND TELEVISION DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/751482
[patent_app_country] => US
[patent_app_date] => 2024-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 36295
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18751482
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/751482 | DISPLAY DEVICE, DISPLAY MODULE, ELECTRONIC DEVICE, AND TELEVISION DEVICE | Jun 23, 2024 | Pending |
Array
(
[id] => 19468107
[patent_doc_number] => 20240321777
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => METHODS FOR FORMING THREE-DIMENSIONAL MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/735887
[patent_app_country] => US
[patent_app_date] => 2024-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13917
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18735887
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/735887 | METHODS FOR FORMING THREE-DIMENSIONAL MEMORY DEVICES | Jun 5, 2024 | Pending |
Array
(
[id] => 19407241
[patent_doc_number] => 20240290752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-29
[patent_title] => APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/658874
[patent_app_country] => US
[patent_app_date] => 2024-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6109
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658874
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/658874 | APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR DEVICES | May 7, 2024 | Pending |
Array
(
[id] => 20191265
[patent_doc_number] => 12402405
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-26
[patent_title] => Integration of multiple fin stuctures on a single substrate
[patent_app_type] => utility
[patent_app_number] => 18/624284
[patent_app_country] => US
[patent_app_date] => 2024-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 62
[patent_no_of_words] => 12554
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624284
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/624284 | Integration of multiple fin stuctures on a single substrate | Apr 1, 2024 | Issued |
Array
(
[id] => 19364213
[patent_doc_number] => 20240266247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-08
[patent_title] => THERMAL RESISTOR AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/615907
[patent_app_country] => US
[patent_app_date] => 2024-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16370
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615907
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/615907 | THERMAL RESISTOR AND METHOD OF MANUFACTURING THE SAME | Mar 24, 2024 | Pending |
Array
(
[id] => 19305787
[patent_doc_number] => 20240234367
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-11
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/612474
[patent_app_country] => US
[patent_app_date] => 2024-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8789
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18612474
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/612474 | SEMICONDUCTOR PACKAGE | Mar 20, 2024 | Pending |
Array
(
[id] => 20216144
[patent_doc_number] => 12412798
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-09
[patent_title] => Semiconductor device and method of forming
[patent_app_type] => utility
[patent_app_number] => 18/593626
[patent_app_country] => US
[patent_app_date] => 2024-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 2412
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593626
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/593626 | Semiconductor device and method of forming | Feb 29, 2024 | Issued |
Array
(
[id] => 19943713
[patent_doc_number] => 12315850
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-27
[patent_title] => Light-emitting element ink, display device, and method of fabricating the display device
[patent_app_type] => utility
[patent_app_number] => 18/433201
[patent_app_country] => US
[patent_app_date] => 2024-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 11241
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18433201
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/433201 | Light-emitting element ink, display device, and method of fabricating the display device | Feb 4, 2024 | Issued |
Array
(
[id] => 20162944
[patent_doc_number] => 12389601
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-12
[patent_title] => Three dimensional semiconductor memory device and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 18/430189
[patent_app_country] => US
[patent_app_date] => 2024-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 55
[patent_figures_cnt] => 55
[patent_no_of_words] => 8050
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18430189
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/430189 | Three dimensional semiconductor memory device and method for fabricating the same | Jan 31, 2024 | Issued |
Array
(
[id] => 19253036
[patent_doc_number] => 20240204033
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => SHALLOW TRENCH TEXTURED REGIONS AND ASSOCIATED METHODS
[patent_app_type] => utility
[patent_app_number] => 18/429727
[patent_app_country] => US
[patent_app_date] => 2024-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7089
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18429727
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/429727 | Shallow trench textured regions and associated methods | Jan 31, 2024 | Issued |
Array
(
[id] => 19161277
[patent_doc_number] => 20240153984
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-09
[patent_title] => SHALLOW TRENCH TEXTURED REGIONS AND ASSOCIATED METHODS
[patent_app_type] => utility
[patent_app_number] => 18/413311
[patent_app_country] => US
[patent_app_date] => 2024-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7061
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413311
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/413311 | SHALLOW TRENCH TEXTURED REGIONS AND ASSOCIATED METHODS | Jan 15, 2024 | Pending |
Array
(
[id] => 19176157
[patent_doc_number] => 20240162131
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/406161
[patent_app_country] => US
[patent_app_date] => 2024-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8403
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 212
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406161
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/406161 | Semiconductor devices and methods of manufacturing semiconductor devices | Jan 6, 2024 | Issued |
Array
(
[id] => 19176333
[patent_doc_number] => 20240162307
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/392870
[patent_app_country] => US
[patent_app_date] => 2023-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10190
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18392870
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/392870 | Semiconductor devices | Dec 20, 2023 | Issued |
Array
(
[id] => 19253149
[patent_doc_number] => 20240204146
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/526862
[patent_app_country] => US
[patent_app_date] => 2023-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16130
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526862
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/526862 | DISPLAY DEVICE | Nov 30, 2023 | Pending |
Array
(
[id] => 19305586
[patent_doc_number] => 20240234166
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => CHIP PACKAGE STRUCTURE AND METHOD FOR PRODUCING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/526100
[patent_app_country] => US
[patent_app_date] => 2023-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3766
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526100
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/526100 | CHIP PACKAGE STRUCTURE AND METHOD FOR PRODUCING THE SAME | Nov 30, 2023 | Pending |
Array
(
[id] => 19305586
[patent_doc_number] => 20240234166
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => CHIP PACKAGE STRUCTURE AND METHOD FOR PRODUCING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/526100
[patent_app_country] => US
[patent_app_date] => 2023-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3766
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526100
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/526100 | CHIP PACKAGE STRUCTURE AND METHOD FOR PRODUCING THE SAME | Nov 30, 2023 | Pending |
Array
(
[id] => 19252807
[patent_doc_number] => 20240203804
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => ENGINEERED SEMICONDUCTOR SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 18/514563
[patent_app_country] => US
[patent_app_date] => 2023-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5448
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514563
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/514563 | ENGINEERED SEMICONDUCTOR SUBSTRATE | Nov 19, 2023 | Pending |
Array
(
[id] => 19064645
[patent_doc_number] => 11943922
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-03-26
[patent_title] => Non-volatile memory with three dimensional stacked word line switches
[patent_app_type] => utility
[patent_app_number] => 18/507026
[patent_app_country] => US
[patent_app_date] => 2023-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 42
[patent_no_of_words] => 18166
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507026
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/507026 | Non-volatile memory with three dimensional stacked word line switches | Nov 10, 2023 | Issued |