
Yu-hsi David Sun
Examiner (ID: 6796, Phone: (571)270-5773 , Office: P/2895 )
| Most Active Art Unit | 2895 |
| Art Unit(s) | 2895, 2817, 4183 |
| Total Applications | 1212 |
| Issued Applications | 929 |
| Pending Applications | 85 |
| Abandoned Applications | 213 |
Applications
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|---|---|---|---|
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