Search

Yu-hsi David Sun

Examiner (ID: 483, Phone: (571)270-5773 , Office: P/2895 )

Most Active Art Unit
2895
Art Unit(s)
2895, 2817, 4183
Total Applications
1183
Issued Applications
914
Pending Applications
75
Abandoned Applications
211

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17590733 [patent_doc_number] => 11329010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => Integrated circuit shield [patent_app_type] => utility [patent_app_number] => 16/838577 [patent_app_country] => US [patent_app_date] => 2020-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5889 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16838577 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/838577
Integrated circuit shield Apr 1, 2020 Issued
Array ( [id] => 17326643 [patent_doc_number] => 11217669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-04 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/837408 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 10143 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16837408 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/837408
Semiconductor devices Mar 31, 2020 Issued
Array ( [id] => 16631656 [patent_doc_number] => 20210050309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => SEMICONDUCTOR PACKAGE AND A METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/835884 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835884 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/835884
Semiconductor package and a method for manufacturing the same Mar 30, 2020 Issued
Array ( [id] => 17130418 [patent_doc_number] => 20210305187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => PROCESS FOR REMOVING BOND FILM FROM CAVITIES IN PRINTED CIRCUIT BOARDS [patent_app_type] => utility [patent_app_number] => 16/836470 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16836470 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/836470
Process for removing bond film from cavities in printed circuit boards Mar 30, 2020 Issued
Array ( [id] => 17196066 [patent_doc_number] => 11164833 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Semiconductor device using wires and stacked semiconductor package [patent_app_type] => utility [patent_app_number] => 16/835980 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6358 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835980 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/835980
Semiconductor device using wires and stacked semiconductor package Mar 30, 2020 Issued
Array ( [id] => 16179347 [patent_doc_number] => 20200226315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => MEMORY CELL LAYOUT FOR LOW CURRENT FIELD-INDUCED MRAM [patent_app_type] => utility [patent_app_number] => 16/834016 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16834016 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/834016
Memory cell layout for low current field-induced MRAM Mar 29, 2020 Issued
Array ( [id] => 17730778 [patent_doc_number] => 11387179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => IC package with half-bridge power module [patent_app_type] => utility [patent_app_number] => 16/827455 [patent_app_country] => US [patent_app_date] => 2020-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 7842 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16827455 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/827455
IC package with half-bridge power module Mar 22, 2020 Issued
Array ( [id] => 17115715 [patent_doc_number] => 20210296312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => INTEGRATION OF MULTIPLE FIN STUCTURES ON A SINGLE SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/823581 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16823581 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/823581
Integration of multiple fin structures on a single substrate Mar 18, 2020 Issued
Array ( [id] => 17683402 [patent_doc_number] => 11367667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-21 [patent_title] => Build-up package for integrated circuit devices, and methods of making same [patent_app_type] => utility [patent_app_number] => 16/819486 [patent_app_country] => US [patent_app_date] => 2020-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 2547 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16819486 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/819486
Build-up package for integrated circuit devices, and methods of making same Mar 15, 2020 Issued
Array ( [id] => 17652745 [patent_doc_number] => 11355485 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Semiconductor die and semiconductor package [patent_app_type] => utility [patent_app_number] => 16/818426 [patent_app_country] => US [patent_app_date] => 2020-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 7159 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16818426 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/818426
Semiconductor die and semiconductor package Mar 12, 2020 Issued
Array ( [id] => 18364724 [patent_doc_number] => 20230146315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => AL BONDING WIRE [patent_app_type] => utility [patent_app_number] => 17/911090 [patent_app_country] => US [patent_app_date] => 2020-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6492 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17911090 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/911090
Al bonding wire Mar 12, 2020 Issued
Array ( [id] => 17085684 [patent_doc_number] => 20210280691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells [patent_app_type] => utility [patent_app_number] => 16/807388 [patent_app_country] => US [patent_app_date] => 2020-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16807388 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/807388
Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells Mar 2, 2020 Issued
Array ( [id] => 17456063 [patent_doc_number] => 11270930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Laminate stacked on die for high voltage isolation capacitor [patent_app_type] => utility [patent_app_number] => 16/806362 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16806362 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/806362
Laminate stacked on die for high voltage isolation capacitor Mar 1, 2020 Issued
Array ( [id] => 17456063 [patent_doc_number] => 11270930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Laminate stacked on die for high voltage isolation capacitor [patent_app_type] => utility [patent_app_number] => 16/806362 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16806362 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/806362
Laminate stacked on die for high voltage isolation capacitor Mar 1, 2020 Issued
Array ( [id] => 17456063 [patent_doc_number] => 11270930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Laminate stacked on die for high voltage isolation capacitor [patent_app_type] => utility [patent_app_number] => 16/806362 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16806362 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/806362
Laminate stacked on die for high voltage isolation capacitor Mar 1, 2020 Issued
Array ( [id] => 17456063 [patent_doc_number] => 11270930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Laminate stacked on die for high voltage isolation capacitor [patent_app_type] => utility [patent_app_number] => 16/806362 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3716 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16806362 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/806362
Laminate stacked on die for high voltage isolation capacitor Mar 1, 2020 Issued
Array ( [id] => 17668323 [patent_doc_number] => 11362027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-14 [patent_title] => Semiconductor devices and methods of manufacturing semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/805027 [patent_app_country] => US [patent_app_date] => 2020-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 8331 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805027 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/805027
Semiconductor devices and methods of manufacturing semiconductor devices Feb 27, 2020 Issued
Array ( [id] => 17544102 [patent_doc_number] => 11309236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/805340 [patent_app_country] => US [patent_app_date] => 2020-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6234 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805340 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/805340
Semiconductor device Feb 27, 2020 Issued
Array ( [id] => 16081079 [patent_doc_number] => 20200194526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => THIN FILM TRANSISTOR SUBSTRATES AND DISPLAY PANELS [patent_app_type] => utility [patent_app_number] => 16/801149 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5553 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16801149 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/801149
THIN FILM TRANSISTOR SUBSTRATES AND DISPLAY PANELS Feb 25, 2020 Abandoned
Array ( [id] => 16765601 [patent_doc_number] => 20210111183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => DEVICE AND METHOD OF FORMING WITH THREE-DIMENSIONAL MEMORY AND THREE-DIMENSIONAL LOGIC [patent_app_type] => utility [patent_app_number] => 16/801747 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16801747 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/801747
Device and method of forming with three-dimensional memory and three-dimensional logic Feb 25, 2020 Issued
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