
Yu-hsi David Sun
Examiner (ID: 6796, Phone: (571)270-5773 , Office: P/2895 )
| Most Active Art Unit | 2895 |
| Art Unit(s) | 2895, 2817, 4183 |
| Total Applications | 1212 |
| Issued Applications | 929 |
| Pending Applications | 85 |
| Abandoned Applications | 213 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19305586
[patent_doc_number] => 20240234166
[patent_country] => US
[patent_kind] => A9
[patent_issue_date] => 2024-07-11
[patent_title] => CHIP PACKAGE STRUCTURE AND METHOD FOR PRODUCING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/526100
[patent_app_country] => US
[patent_app_date] => 2023-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3766
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526100
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/526100 | CHIP PACKAGE STRUCTURE AND METHOD FOR PRODUCING THE SAME | Nov 30, 2023 | Pending |
Array
(
[id] => 19252807
[patent_doc_number] => 20240203804
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-20
[patent_title] => ENGINEERED SEMICONDUCTOR SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 18/514563
[patent_app_country] => US
[patent_app_date] => 2023-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5448
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18514563
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/514563 | ENGINEERED SEMICONDUCTOR SUBSTRATE | Nov 19, 2023 | Pending |
Array
(
[id] => 19191467
[patent_doc_number] => 20240170380
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-23
[patent_title] => Semiconductor Package
[patent_app_type] => utility
[patent_app_number] => 18/511078
[patent_app_country] => US
[patent_app_date] => 2023-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3405
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18511078
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/511078 | Semiconductor Package | Nov 15, 2023 | Pending |
Array
(
[id] => 19064645
[patent_doc_number] => 11943922
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-03-26
[patent_title] => Non-volatile memory with three dimensional stacked word line switches
[patent_app_type] => utility
[patent_app_number] => 18/507026
[patent_app_country] => US
[patent_app_date] => 2023-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 42
[patent_no_of_words] => 18166
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507026
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/507026 | Non-volatile memory with three dimensional stacked word line switches | Nov 10, 2023 | Issued |
Array
(
[id] => 19321619
[patent_doc_number] => 20240243166
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-18
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/500932
[patent_app_country] => US
[patent_app_date] => 2023-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5596
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 369
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18500932
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/500932 | SEMICONDUCTOR DEVICE | Nov 1, 2023 | Pending |
Array
(
[id] => 18991219
[patent_doc_number] => 20240063188
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-22
[patent_title] => APPARATUSES AND METHODS FOR COUPLING A PLURALITY OF SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/499087
[patent_app_country] => US
[patent_app_date] => 2023-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6957
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18499087
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/499087 | Apparatuses and methods for coupling a plurality of semiconductor devices | Oct 30, 2023 | Issued |
Array
(
[id] => 19146488
[patent_doc_number] => 20240145518
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-02
[patent_title] => IMAGE SENSING DEVICE AND IMAGING DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/496674
[patent_app_country] => US
[patent_app_date] => 2023-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9892
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18496674
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/496674 | IMAGE SENSING DEVICE AND IMAGING DEVICE INCLUDING THE SAME | Oct 26, 2023 | Pending |
Array
(
[id] => 20831581
[patent_doc_number] => 12685186
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-07-14
[patent_title] => Cavities in package conductive terminals
[patent_app_type] => utility
[patent_app_number] => 18/496598
[patent_app_country] => US
[patent_app_date] => 2023-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 0
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18496598
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/496598 | Cavities in package conductive terminals | Oct 26, 2023 | Issued |
Array
(
[id] => 19758057
[patent_doc_number] => 20250046622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => HYBRID SUBSTRATES AND MANUFACTURING METHODS THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/496656
[patent_app_country] => US
[patent_app_date] => 2023-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11109
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18496656
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/496656 | HYBRID SUBSTRATES AND MANUFACTURING METHODS THEREOF | Oct 26, 2023 | Pending |
Array
(
[id] => 19679402
[patent_doc_number] => 12191275
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-07
[patent_title] => Power semiconductor apparatus and fabrication method for the same
[patent_app_type] => utility
[patent_app_number] => 18/496093
[patent_app_country] => US
[patent_app_date] => 2023-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 70
[patent_figures_cnt] => 127
[patent_no_of_words] => 35925
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18496093
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/496093 | Power semiconductor apparatus and fabrication method for the same | Oct 26, 2023 | Issued |
Array
(
[id] => 20162941
[patent_doc_number] => 12389598
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-12
[patent_title] => Vertical semiconductor device and fabrication method thereof
[patent_app_type] => utility
[patent_app_number] => 18/488751
[patent_app_country] => US
[patent_app_date] => 2023-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 51
[patent_no_of_words] => 18758
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488751
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/488751 | Vertical semiconductor device and fabrication method thereof | Oct 16, 2023 | Issued |
Array
(
[id] => 19987009
[patent_doc_number] => 20250125231
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-17
[patent_title] => Direct Bonded Semiconductor Die Package
[patent_app_type] => utility
[patent_app_number] => 18/488284
[patent_app_country] => US
[patent_app_date] => 2023-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3233
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488284
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/488284 | Direct Bonded Semiconductor Die Package | Oct 16, 2023 | Pending |
Array
(
[id] => 19760160
[patent_doc_number] => 20250048725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-06
[patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/488251
[patent_app_country] => US
[patent_app_date] => 2023-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9310
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488251
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/488251 | SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME | Oct 16, 2023 | Pending |
Array
(
[id] => 19988636
[patent_doc_number] => 20250126858
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-17
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/488448
[patent_app_country] => US
[patent_app_date] => 2023-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4076
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488448
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/488448 | SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME | Oct 16, 2023 | Pending |
Array
(
[id] => 19387026
[patent_doc_number] => 20240276896
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => TITANIUM SILICON NITRIDE BARRIER LAYER
[patent_app_type] => utility
[patent_app_number] => 18/488851
[patent_app_country] => US
[patent_app_date] => 2023-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10698
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18488851
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/488851 | Titanium silicon nitride barrier layer | Oct 16, 2023 | Issued |
Array
(
[id] => 20469477
[patent_doc_number] => 12525520
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-13
[patent_title] => Electronics unit with integrated metallic pattern
[patent_app_type] => utility
[patent_app_number] => 18/377962
[patent_app_country] => US
[patent_app_date] => 2023-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 0
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18377962
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/377962 | Electronics unit with integrated metallic pattern | Oct 8, 2023 | Issued |
Array
(
[id] => 19893296
[patent_doc_number] => 20250118608
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-04-10
[patent_title] => INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/482954
[patent_app_country] => US
[patent_app_date] => 2023-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10735
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482954
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/482954 | INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAME | Oct 8, 2023 | Pending |
Array
(
[id] => 19178190
[patent_doc_number] => 20240164164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-16
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/482717
[patent_app_country] => US
[patent_app_date] => 2023-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23259
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18482717
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/482717 | DISPLAY DEVICE | Oct 5, 2023 | Pending |
Array
(
[id] => 20649730
[patent_doc_number] => 12604693
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-14
[patent_title] => Method of manufacturing chips
[patent_app_type] => utility
[patent_app_number] => 18/479958
[patent_app_country] => US
[patent_app_date] => 2023-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 39
[patent_no_of_words] => 9906
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18479958
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/479958 | Method of manufacturing chips | Oct 2, 2023 | Issued |
Array
(
[id] => 19269605
[patent_doc_number] => 20240213309
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-27
[patent_title] => SEMICONDUCTOR DEVICE, SEMICONDUCTOR CIRCUIT, AND METHOD OF CONTROLLING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/480152
[patent_app_country] => US
[patent_app_date] => 2023-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8630
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 298
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480152
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/480152 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR CIRCUIT, AND METHOD OF CONTROLLING SEMICONDUCTOR DEVICE | Oct 2, 2023 | Abandoned |