Search

Yu-hsi David Sun

Examiner (ID: 6796, Phone: (571)270-5773 , Office: P/2895 )

Most Active Art Unit
2895
Art Unit(s)
2895, 2817, 4183
Total Applications
1212
Issued Applications
929
Pending Applications
85
Abandoned Applications
213

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20691864 [patent_doc_number] => 12622036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-05 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/480154 [patent_app_country] => US [patent_app_date] => 2023-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 2126 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18480154 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/480154
Semiconductor device Oct 2, 2023 Issued
Array ( [id] => 19881262 [patent_doc_number] => 20250113519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE WITH PROTECTION LAYER [patent_app_type] => utility [patent_app_number] => 18/479954 [patent_app_country] => US [patent_app_date] => 2023-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18479954 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/479954
Method for forming semiconductor device structure with protection layer Oct 2, 2023 Issued
Array ( [id] => 18898634 [patent_doc_number] => 20240014119 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => FAN-OUT SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/370914 [patent_app_country] => US [patent_app_date] => 2023-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370914 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370914
Fan-out semiconductor package Sep 20, 2023 Issued
Array ( [id] => 21011512 [patent_doc_number] => 12747993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-29 [patent_title] => Lateral bipolar junction transistor device and method of forming same [patent_app_type] => utility [patent_app_number] => 18/370459 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 2073 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370459 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370459
LATERAL BIPOLAR JUNCTION TRANSISTOR DEVICE AND METHOD OF FORMING SAME Sep 19, 2023 Pending
Array ( [id] => 18868109 [patent_doc_number] => 20230422546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => Display Substrate and Display Device [patent_app_type] => utility [patent_app_number] => 18/465950 [patent_app_country] => US [patent_app_date] => 2023-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7454 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 429 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18465950 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/465950
Display substrate and display device Sep 11, 2023 Issued
Array ( [id] => 18851253 [patent_doc_number] => 20230413657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => Display Device and Method for Manufacturing the Same [patent_app_type] => utility [patent_app_number] => 18/239439 [patent_app_country] => US [patent_app_date] => 2023-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7268 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18239439 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/239439
Display device and method for manufacturing the same Aug 28, 2023 Issued
Array ( [id] => 19788591 [patent_doc_number] => 20250062270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => METAL TAB FOR POWER SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 18/233403 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4238 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233403 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/233403
Metal tab for power semiconductor module Aug 13, 2023 Issued
Array ( [id] => 19662131 [patent_doc_number] => 20240429196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => SELECTIVE WIRE COATING DURING WIRE BONDING [patent_app_type] => utility [patent_app_number] => 18/449502 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18449502 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/449502
Selective wire coating during wire bonding Aug 13, 2023 Issued
Array ( [id] => 18812729 [patent_doc_number] => 20230387066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => BONDING WIRE FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/447081 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447081 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447081
BONDING WIRE FOR SEMICONDUCTOR DEVICES Aug 8, 2023 Abandoned
Array ( [id] => 19842704 [patent_doc_number] => 12255104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Semiconductor device and method of manufacture [patent_app_type] => utility [patent_app_number] => 18/363945 [patent_app_country] => US [patent_app_date] => 2023-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8861 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363945 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/363945
Semiconductor device and method of manufacture Aug 1, 2023 Issued
Array ( [id] => 19886830 [patent_doc_number] => 12272557 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Semiconductor device and method [patent_app_type] => utility [patent_app_number] => 18/363563 [patent_app_country] => US [patent_app_date] => 2023-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 37 [patent_no_of_words] => 12207 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363563 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/363563
Semiconductor device and method Jul 31, 2023 Issued
Array ( [id] => 20822201 [patent_doc_number] => 12677692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-07 [patent_title] => Insulation layer for a semiconductor package [patent_app_type] => utility [patent_app_number] => 18/362128 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362128 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362128
Insulation layer for a semiconductor package Jul 30, 2023 Issued
Array ( [id] => 19842696 [patent_doc_number] => 12255096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Semiconductor device with reduced contact resistance and methods of forming the same [patent_app_type] => utility [patent_app_number] => 18/361592 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 28 [patent_no_of_words] => 11190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361592 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361592
Semiconductor device with reduced contact resistance and methods of forming the same Jul 27, 2023 Issued
Array ( [id] => 19619314 [patent_doc_number] => 20240404994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => THERMALLY CONDUCTIVE SPACER [patent_app_type] => utility [patent_app_number] => 18/359645 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6080 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359645 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359645
THERMALLY CONDUCTIVE SPACER Jul 25, 2023 Pending
Array ( [id] => 18774460 [patent_doc_number] => 20230369291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => SEMICONDUCTOR ASSEMBLIES WITH SYSTEMS AND METHODS FOR MANAGING HIGH DIE STACK STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/225369 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7584 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225369 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/225369
Semiconductor assemblies with systems and methods for managing high die stack structures Jul 23, 2023 Issued
Array ( [id] => 18774511 [patent_doc_number] => 20230369342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => Semiconductor Device [patent_app_type] => utility [patent_app_number] => 18/224224 [patent_app_country] => US [patent_app_date] => 2023-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29408 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224224 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/224224
Semiconductor device Jul 19, 2023 Issued
Array ( [id] => 20923812 [patent_doc_number] => 12718878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-25 [patent_title] => NAND die with wire-bond inductive compensation for altered bond wire bandwidth in memory devices [patent_app_type] => utility [patent_app_number] => 18/355111 [patent_app_country] => US [patent_app_date] => 2023-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5040 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18355111 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/355111
NAND DIE WITH WIRE-BOND INDUCTIVE COMPENSATION FOR ALTERED BOND WIRE BANDWIDTH IN MEMORY DEVICES Jul 18, 2023 Pending
Array ( [id] => 18757621 [patent_doc_number] => 20230361084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/353343 [patent_app_country] => US [patent_app_date] => 2023-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18353343 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/353343
Semiconductor package and manufacturing method thereof Jul 16, 2023 Issued
Array ( [id] => 19733819 [patent_doc_number] => 12211821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Package-on-package assembly with wire bond vias [patent_app_type] => utility [patent_app_number] => 18/221171 [patent_app_country] => US [patent_app_date] => 2023-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 68 [patent_no_of_words] => 17454 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18221171 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/221171
Package-on-package assembly with wire bond vias Jul 11, 2023 Issued
Array ( [id] => 19484227 [patent_doc_number] => 20240332269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE, FABRICATION METHOD AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/220768 [patent_app_country] => US [patent_app_date] => 2023-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18220768 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/220768
SEMICONDUCTOR PACKAGE STRUCTURE, FABRICATION METHOD AND MEMORY SYSTEM Jul 10, 2023 Pending
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