Search

Zachary J. Snyder

Examiner (ID: 914, Phone: (571)270-5291 , Office: P/2875 )

Most Active Art Unit
2875
Art Unit(s)
2875, 2889
Total Applications
571
Issued Applications
340
Pending Applications
1
Abandoned Applications
233

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6722475 [patent_doc_number] => 20030056165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'IC test cell with memory output connected to input multiplexer' [patent_app_type] => new [patent_app_number] => 10/280980 [patent_app_country] => US [patent_app_date] => 2002-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14504 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20030056165.pdf [firstpage_image] =>[orig_patent_app_number] => 10280980 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/280980
IC test cell with memory output connected to input multiplexer Oct 24, 2002 Issued
Array ( [id] => 7623766 [patent_doc_number] => 06725411 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-20 [patent_title] => 'Iterated soft-decision decoding of block codes' [patent_app_type] => B1 [patent_app_number] => 10/263226 [patent_app_country] => US [patent_app_date] => 2002-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5514 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/725/06725411.pdf [firstpage_image] =>[orig_patent_app_number] => 10263226 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263226
Iterated soft-decision decoding of block codes Oct 1, 2002 Issued
Array ( [id] => 6775597 [patent_doc_number] => 20030018935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-23 [patent_title] => 'Semiconductor memory, memory device, and memory card' [patent_app_type] => new [patent_app_number] => 10/244539 [patent_app_country] => US [patent_app_date] => 2002-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 23195 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20030018935.pdf [firstpage_image] =>[orig_patent_app_number] => 10244539 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/244539
Semiconductor memory, memory device, and memory card Sep 16, 2002 Issued
Array ( [id] => 6784557 [patent_doc_number] => 20030066005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Bus power savings using selective inversion in an ECC system' [patent_app_type] => new [patent_app_number] => 10/236338 [patent_app_country] => US [patent_app_date] => 2002-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5822 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20030066005.pdf [firstpage_image] =>[orig_patent_app_number] => 10236338 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/236338
Bus power savings using selective inversion in an ECC system Sep 5, 2002 Issued
Array ( [id] => 1407761 [patent_doc_number] => 06560739 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-06 [patent_title] => 'Mechanism for enabling compliance with the IEEE standard 1149.1 for boundary-scan designs and tests' [patent_app_type] => B1 [patent_app_number] => 10/185166 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 6791 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/560/06560739.pdf [firstpage_image] =>[orig_patent_app_number] => 10185166 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/185166
Mechanism for enabling compliance with the IEEE standard 1149.1 for boundary-scan designs and tests Jun 26, 2002 Issued
Array ( [id] => 1181492 [patent_doc_number] => 06754861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-22 [patent_title] => 'Circuitry for and system and substrate with circuitry for aligning output signals in massively parallel testers and other electronic devices' [patent_app_type] => B2 [patent_app_number] => 10/164975 [patent_app_country] => US [patent_app_date] => 2002-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2638 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/754/06754861.pdf [firstpage_image] =>[orig_patent_app_number] => 10164975 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/164975
Circuitry for and system and substrate with circuitry for aligning output signals in massively parallel testers and other electronic devices Jun 5, 2002 Issued
Array ( [id] => 7271452 [patent_doc_number] => 20040059970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Multipurpose architecture and method for testing electronic logic and memory devices' [patent_app_type] => new [patent_app_number] => 10/154578 [patent_app_country] => US [patent_app_date] => 2002-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4422 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20040059970.pdf [firstpage_image] =>[orig_patent_app_number] => 10154578 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/154578
Multipurpose architecture and method for testing electronic logic and memory devices May 22, 2002 Abandoned
Array ( [id] => 1258652 [patent_doc_number] => 06671849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-30 [patent_title] => 'Reliability-based type-II hybrid ARQ scheme' [patent_app_type] => B2 [patent_app_number] => 10/146587 [patent_app_country] => US [patent_app_date] => 2002-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5252 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/671/06671849.pdf [firstpage_image] =>[orig_patent_app_number] => 10146587 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/146587
Reliability-based type-II hybrid ARQ scheme May 13, 2002 Issued
Array ( [id] => 6161663 [patent_doc_number] => 20020147953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'System and method of dynamically optimizing a transmission mode of wirelessly transmitted information' [patent_app_type] => new [patent_app_number] => 10/072359 [patent_app_country] => US [patent_app_date] => 2002-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6314 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20020147953.pdf [firstpage_image] =>[orig_patent_app_number] => 10072359 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/072359
System and method of dynamically optimizing a transmission mode of wirelessly transmitted information Mar 31, 2002 Issued
Array ( [id] => 7623770 [patent_doc_number] => 06725407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-20 [patent_title] => 'Method and configuration for protecting data during a self-test of a microcontroller' [patent_app_type] => B2 [patent_app_number] => 10/105591 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2721 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/725/06725407.pdf [firstpage_image] =>[orig_patent_app_number] => 10105591 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/105591
Method and configuration for protecting data during a self-test of a microcontroller Mar 24, 2002 Issued
Array ( [id] => 6211694 [patent_doc_number] => 20020073369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Method and apparatus for controlling and observing data in a logic block-based asic' [patent_app_type] => new [patent_app_number] => 10/056686 [patent_app_country] => US [patent_app_date] => 2002-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 14221 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20020073369.pdf [firstpage_image] =>[orig_patent_app_number] => 10056686 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/056686
Method and apparatus for controlling and observing data in a logic block-based ASIC Jan 23, 2002 Issued
Array ( [id] => 6369747 [patent_doc_number] => 20020059551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Cyclic trellis-coded modulation' [patent_app_type] => new [patent_app_number] => 10/039038 [patent_app_country] => US [patent_app_date] => 2002-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 13991 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20020059551.pdf [firstpage_image] =>[orig_patent_app_number] => 10039038 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039038
Cyclic trellis-coded modulation Jan 3, 2002 Issued
Array ( [id] => 6134277 [patent_doc_number] => 20020078414 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Method for validating communicated packets of data and for locating erroneous packets' [patent_app_type] => new [patent_app_number] => 10/029670 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4032 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20020078414.pdf [firstpage_image] =>[orig_patent_app_number] => 10029670 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/029670
System, computer-readable medium, and method for validating communicated packets of data and for locating erroneous packets Dec 30, 2001 Issued
Array ( [id] => 626172 [patent_doc_number] => 07139794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'System and methods for network image delivery with dynamic viewing frustum optimized for limited bandwidth communication channels' [patent_app_type] => utility [patent_app_number] => 10/035981 [patent_app_country] => US [patent_app_date] => 2001-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5948 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/139/07139794.pdf [firstpage_image] =>[orig_patent_app_number] => 10035981 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/035981
System and methods for network image delivery with dynamic viewing frustum optimized for limited bandwidth communication channels Dec 23, 2001 Issued
Array ( [id] => 6757606 [patent_doc_number] => 20030005383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Detection unit, device for reproducing an information carrier and method for detecting' [patent_app_type] => new [patent_app_number] => 09/994271 [patent_app_country] => US [patent_app_date] => 2001-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5151 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0005/20030005383.pdf [firstpage_image] =>[orig_patent_app_number] => 09994271 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/994271
Detection unit, device for reproducing an information carrier and method for detecting Nov 25, 2001 Issued
Array ( [id] => 6655786 [patent_doc_number] => 20030106015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Tap-selectable reduced state sequence estimator' [patent_app_type] => new [patent_app_number] => 09/990633 [patent_app_country] => US [patent_app_date] => 2001-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3533 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20030106015.pdf [firstpage_image] =>[orig_patent_app_number] => 09990633 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/990633
Tap-selectable reduced state sequence estimator Nov 20, 2001 Issued
Array ( [id] => 6802466 [patent_doc_number] => 20030097631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Finite state automaton for control of frame error recovery for a universal serial bus video camera' [patent_app_type] => new [patent_app_number] => 09/990748 [patent_app_country] => US [patent_app_date] => 2001-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1157 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20030097631.pdf [firstpage_image] =>[orig_patent_app_number] => 09990748 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/990748
Finite state automaton for control of frame error recovery for a universal serial bus video camera Nov 15, 2001 Issued
Array ( [id] => 6756473 [patent_doc_number] => 20030004250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Light weight rubber composition containing clay' [patent_app_type] => new [patent_app_number] => 10/002870 [patent_app_country] => US [patent_app_date] => 2001-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12271 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20030004250.pdf [firstpage_image] =>[orig_patent_app_number] => 10002870 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/002870
Light weight rubber composition containing clay Nov 14, 2001 Issued
Array ( [id] => 6784568 [patent_doc_number] => 20030066016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Methodology for detecting lost packets' [patent_app_type] => new [patent_app_number] => 09/968275 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2367 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20030066016.pdf [firstpage_image] =>[orig_patent_app_number] => 09968275 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/968275
Methodology for detecting lost packets Sep 27, 2001 Abandoned
Array ( [id] => 1357782 [patent_doc_number] => 06591397 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'Checksum generator with minimum overflow' [patent_app_type] => B1 [patent_app_number] => 09/966032 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4681 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/591/06591397.pdf [firstpage_image] =>[orig_patent_app_number] => 09966032 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/966032
Checksum generator with minimum overflow Sep 27, 2001 Issued
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