Search

Zachary W. Wilkes

Examiner (ID: 2151, Phone: (571)270-7540 , Office: P/2872 )

Most Active Art Unit
2872
Art Unit(s)
2873, 2872
Total Applications
1061
Issued Applications
667
Pending Applications
96
Abandoned Applications
322

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19444554 [patent_doc_number] => 12094845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Electronic device including connecting pad and conductive portion [patent_app_type] => utility [patent_app_number] => 18/498075 [patent_app_country] => US [patent_app_date] => 2023-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 6078 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18498075 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/498075
Electronic device including connecting pad and conductive portion Oct 30, 2023 Issued
Array ( [id] => 19531981 [patent_doc_number] => 20240355883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/385537 [patent_app_country] => US [patent_app_date] => 2023-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18385537 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/385537
Semiconductor device having a SiGe blocking layer and method of fabricating the same Oct 30, 2023 Issued
Array ( [id] => 19852864 [patent_doc_number] => 20250098215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => SEMICONDUCTOR DEVICE WITH GATE CONTACT OVER AN ACTIVE REGION [patent_app_type] => utility [patent_app_number] => 18/370611 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9537 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370611 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370611
SEMICONDUCTOR DEVICE WITH GATE CONTACT OVER AN ACTIVE REGION Oct 29, 2023 Pending
Array ( [id] => 20002443 [patent_doc_number] => 20250140665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => LEADED PACKAGE USING ROUTING LAYER FOR INTEGRATED CIRCUIT DIE [patent_app_type] => utility [patent_app_number] => 18/496549 [patent_app_country] => US [patent_app_date] => 2023-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18496549 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/496549
LEADED PACKAGE USING ROUTING LAYER FOR INTEGRATED CIRCUIT DIE Oct 26, 2023 Pending
Array ( [id] => 18959157 [patent_doc_number] => 20240047484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => MULTILEVEL SEMICONDUCTOR DEVICE AND STRUCTURE WITH IMAGE SENSORS AND WAFER BONDING [patent_app_type] => utility [patent_app_number] => 18/382463 [patent_app_country] => US [patent_app_date] => 2023-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17340 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18382463 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/382463
Multilevel semiconductor device and structure with image sensors and wafer bonding Oct 19, 2023 Issued
Array ( [id] => 19285911 [patent_doc_number] => 20240222388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => Display Device [patent_app_type] => utility [patent_app_number] => 18/491139 [patent_app_country] => US [patent_app_date] => 2023-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12780 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18491139 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/491139
Display Device Oct 19, 2023 Pending
Array ( [id] => 19986967 [patent_doc_number] => 20250125189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => INTERCONNECT STRUCTURE WITH REINFORCING SPACER AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/486222 [patent_app_country] => US [patent_app_date] => 2023-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18486222 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/486222
Interconnect structure with reinforcing spacer and method for manufacturing the same Oct 12, 2023 Issued
Array ( [id] => 19116392 [patent_doc_number] => 20240128142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => DOUBLE-SIDED SIP PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/486147 [patent_app_country] => US [patent_app_date] => 2023-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18486147 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/486147
Double-sided sip packaging structure having interposer including a groove and manufacturing method thereof Oct 11, 2023 Issued
Array ( [id] => 18943764 [patent_doc_number] => 20240038903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => TWO-DIMENSIONAL MATERIAL-BASED WIRING CONDUCTIVE LAYER CONTACT STRUCTURES, ELECTRONIC DEVICES INCLUDING THE SAME, AND METHODS OF MANUFACTURING THE ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 18/483058 [patent_app_country] => US [patent_app_date] => 2023-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6702 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18483058 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/483058
Two-dimensional material-based wiring conductive layer contact structures, electronic devices including the same, and methods of manufacturing the electronic devices Oct 8, 2023 Issued
Array ( [id] => 18927103 [patent_doc_number] => 20240030107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE AND MOUNTING STRUCTURE THEREOF [patent_app_type] => utility [patent_app_number] => 18/479587 [patent_app_country] => US [patent_app_date] => 2023-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8934 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 374 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18479587 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/479587
Semiconductor device and mounting structure thereof Oct 1, 2023 Issued
Array ( [id] => 19146393 [patent_doc_number] => 20240145423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => CONNECTION STRUCTURE, SEMICONDUCTOR DEVICE, AND INSULATION SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/476434 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10153 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476434 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/476434
CONNECTION STRUCTURE, SEMICONDUCTOR DEVICE, AND INSULATION SUBSTRATE Sep 27, 2023 Pending
Array ( [id] => 19193580 [patent_doc_number] => 20240172493 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => THIN FILM TRANSISTOR SUBSTRATE, DISPLAY DEVICE INCLUDING THE SAME, AND MANUFACTURING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/473021 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473021 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/473021
THIN FILM TRANSISTOR SUBSTRATE, DISPLAY DEVICE INCLUDING THE SAME, AND MANUFACTURING METHODS THEREOF Sep 21, 2023 Pending
Array ( [id] => 18898665 [patent_doc_number] => 20240014150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR ADJUSTING PHASE CHARACTERISTICS THEREOF [patent_app_type] => utility [patent_app_number] => 18/472863 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18472863 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/472863
SEMICONDUCTOR DEVICE AND METHOD FOR ADJUSTING PHASE CHARACTERISTICS THEREOF Sep 21, 2023 Pending
Array ( [id] => 19071133 [patent_doc_number] => 20240105559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => ELECTRONIC COMPONENT [patent_app_type] => utility [patent_app_number] => 18/371150 [patent_app_country] => US [patent_app_date] => 2023-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18371150 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/371150
ELECTRONIC COMPONENT Sep 20, 2023 Pending
Array ( [id] => 20637903 [patent_doc_number] => 12598800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-04-07 [patent_title] => Wide bandgap transistor layout with staggered gate electrode fingers and split active regions [patent_app_type] => utility [patent_app_number] => 18/370120 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370120 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370120
Wide bandgap transistor layout with staggered gate electrode fingers and split active regions Sep 18, 2023 Issued
Array ( [id] => 19790124 [patent_doc_number] => 20250063803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/368552 [patent_app_country] => US [patent_app_date] => 2023-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3642 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18368552 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/368552
Semiconductor device having non-metal semiconductor capacitor and MOS capacitor regions with doped fin-shaped structures and method for fabricating the same Sep 13, 2023 Issued
Array ( [id] => 19790123 [patent_doc_number] => 20250063802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/367472 [patent_app_country] => US [patent_app_date] => 2023-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3232 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18367472 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/367472
Method for fabricating semiconductor device using patterned mask for forming hard masks on gate structures Sep 12, 2023 Issued
Array ( [id] => 18866131 [patent_doc_number] => 20230420568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => METHOD FOR FORMING OXIDE SEMICONDUCTOR FILM, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/243688 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18243688 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/243688
Method for forming oxide semiconductor film, semiconductor device, and method for manufacturing semiconductor device Sep 7, 2023 Issued
Array ( [id] => 18866131 [patent_doc_number] => 20230420568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => METHOD FOR FORMING OXIDE SEMICONDUCTOR FILM, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/243688 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18243688 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/243688
Method for forming oxide semiconductor film, semiconductor device, and method for manufacturing semiconductor device Sep 7, 2023 Issued
Array ( [id] => 18866131 [patent_doc_number] => 20230420568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => METHOD FOR FORMING OXIDE SEMICONDUCTOR FILM, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/243688 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26777 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18243688 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/243688
Method for forming oxide semiconductor film, semiconductor device, and method for manufacturing semiconductor device Sep 7, 2023 Issued
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