Search

Zachary W. Wilkes

Examiner (ID: 2151, Phone: (571)270-7540 , Office: P/2872 )

Most Active Art Unit
2872
Art Unit(s)
2873, 2872
Total Applications
1061
Issued Applications
667
Pending Applications
96
Abandoned Applications
322

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9582110 [patent_doc_number] => 08772113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Method for manufacturing silicon carbide semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/944562 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 5312 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13944562 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/944562
Method for manufacturing silicon carbide semiconductor device Jul 16, 2013 Issued
Array ( [id] => 9269287 [patent_doc_number] => 20140024204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'Method for Selective Growth of Highly Doped Group IV - Sn Semiconductor Materials' [patent_app_type] => utility [patent_app_number] => 13/944592 [patent_app_country] => US [patent_app_date] => 2013-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4226 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13944592 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/944592
Method for selective growth of highly doped group IV—Sn semiconductor materials Jul 16, 2013 Issued
Array ( [id] => 9648536 [patent_doc_number] => 08802546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Method for manufacturing silicon carbide semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/943055 [patent_app_country] => US [patent_app_date] => 2013-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5265 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13943055 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/943055
Method for manufacturing silicon carbide semiconductor device Jul 15, 2013 Issued
Array ( [id] => 11021293 [patent_doc_number] => 20160218247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THEREOF' [patent_app_type] => utility [patent_app_number] => 14/902795 [patent_app_country] => US [patent_app_date] => 2013-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 6496 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14902795 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/902795
Light-emitting device and method of manufacturing thereof Jul 4, 2013 Issued
Array ( [id] => 10512881 [patent_doc_number] => 09240461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-19 [patent_title] => 'Method for fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/932047 [patent_app_country] => US [patent_app_date] => 2013-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 7996 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13932047 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/932047
Method for fabricating semiconductor device Jun 30, 2013 Issued
Array ( [id] => 9121506 [patent_doc_number] => 20130288428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-31 [patent_title] => 'METHOD FOR PRODUCING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/931525 [patent_app_country] => US [patent_app_date] => 2013-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 17887 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13931525 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/931525
Method for producing semiconductor device Jun 27, 2013 Issued
Array ( [id] => 9648528 [patent_doc_number] => 08802538 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-08-12 [patent_title] => 'Methods for hybrid wafer bonding' [patent_app_type] => utility [patent_app_number] => 13/927477 [patent_app_country] => US [patent_app_date] => 2013-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 4801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13927477 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/927477
Methods for hybrid wafer bonding Jun 25, 2013 Issued
Array ( [id] => 10086317 [patent_doc_number] => 09123673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'Wafer back side processing structure and apparatus' [patent_app_type] => utility [patent_app_number] => 13/924993 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3134 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924993 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/924993
Wafer back side processing structure and apparatus Jun 23, 2013 Issued
Array ( [id] => 9589175 [patent_doc_number] => 08778715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'Method of fabricating a neutron detector such as a microstructured semiconductor neutron detector' [patent_app_type] => utility [patent_app_number] => 13/924839 [patent_app_country] => US [patent_app_date] => 2013-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 11469 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13924839 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/924839
Method of fabricating a neutron detector such as a microstructured semiconductor neutron detector Jun 23, 2013 Issued
Array ( [id] => 10303053 [patent_doc_number] => 20150188053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'METHOD FOR PREPARING A SEMICONDUCTING LAYER' [patent_app_type] => utility [patent_app_number] => 14/409804 [patent_app_country] => US [patent_app_date] => 2013-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10246 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14409804 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/409804
Method for preparing a semiconducting layer Jun 16, 2013 Issued
Array ( [id] => 9091306 [patent_doc_number] => 20130270617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'INTEGRATION OF BOTTOM-UP METAL FILM DEPOSITION' [patent_app_type] => utility [patent_app_number] => 13/915184 [patent_app_country] => US [patent_app_date] => 2013-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6250 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13915184 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/915184
Integration of bottom-up metal film deposition Jun 10, 2013 Issued
Array ( [id] => 9188744 [patent_doc_number] => 20130328059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'Method Of Manufacturing Gallium Nitride Substrate And Gallium Nitride Substrate Manufactured Thereby' [patent_app_type] => utility [patent_app_number] => 13/912376 [patent_app_country] => US [patent_app_date] => 2013-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3463 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13912376 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/912376
Method Of Manufacturing Gallium Nitride Substrate And Gallium Nitride Substrate Manufactured Thereby Jun 6, 2013 Abandoned
Array ( [id] => 10892857 [patent_doc_number] => 08916468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-23 [patent_title] => 'Semiconductor device fabrication method' [patent_app_type] => utility [patent_app_number] => 13/911746 [patent_app_country] => US [patent_app_date] => 2013-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 69 [patent_no_of_words] => 15782 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13911746 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/911746
Semiconductor device fabrication method Jun 5, 2013 Issued
Array ( [id] => 9191619 [patent_doc_number] => 20130330934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'METHOD OF FORMING THIN FILM POLY SILICON LAYER' [patent_app_type] => utility [patent_app_number] => 13/912180 [patent_app_country] => US [patent_app_date] => 2013-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5272 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13912180 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/912180
METHOD OF FORMING THIN FILM POLY SILICON LAYER Jun 5, 2013 Abandoned
Array ( [id] => 10321748 [patent_doc_number] => 20150206751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'SUBSTRATE TREATMENT METHOD' [patent_app_type] => utility [patent_app_number] => 14/408390 [patent_app_country] => US [patent_app_date] => 2013-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5666 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14408390 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/408390
Substrate treatment method Jun 4, 2013 Issued
Array ( [id] => 9620851 [patent_doc_number] => 08791024 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-07-29 [patent_title] => 'Method to define multiple layer patterns using a single exposure' [patent_app_type] => utility [patent_app_number] => 13/906795 [patent_app_country] => US [patent_app_date] => 2013-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 43 [patent_no_of_words] => 12234 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13906795 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/906795
Method to define multiple layer patterns using a single exposure May 30, 2013 Issued
Array ( [id] => 9729036 [patent_doc_number] => 20140264743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'NOVEL STRUCTURE OF METAL GATE MIM' [patent_app_type] => utility [patent_app_number] => 13/905856 [patent_app_country] => US [patent_app_date] => 2013-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13905856 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/905856
Structure of metal gate MIM May 29, 2013 Issued
Array ( [id] => 9504069 [patent_doc_number] => 08742386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Oxide based memory with a controlled oxygen vacancy conduction path' [patent_app_type] => utility [patent_app_number] => 13/903307 [patent_app_country] => US [patent_app_date] => 2013-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4174 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13903307 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/903307
Oxide based memory with a controlled oxygen vacancy conduction path May 27, 2013 Issued
Array ( [id] => 9174515 [patent_doc_number] => 20130316500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/898834 [patent_app_country] => US [patent_app_date] => 2013-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 14413 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13898834 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/898834
Method of manufacturing semiconductor device May 20, 2013 Issued
Array ( [id] => 10219944 [patent_doc_number] => 20150104937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-16 [patent_title] => 'SIGNAL LINE FABRICATION METHOD, ARRAY SUBSTRATE FABRICATION METHOD, ARRAY SUBSTRATE AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/387519 [patent_app_country] => US [patent_app_date] => 2013-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3605 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14387519 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/387519
Signal line fabrication method, array substrate fabrication method, array substrate and display device May 19, 2013 Issued
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