Search

Zakiya W. Bates

Examiner (ID: 7534, Phone: (571)272-7039 , Office: P/3674 )

Most Active Art Unit
3674
Art Unit(s)
3676, 3674, 3672
Total Applications
2381
Issued Applications
2003
Pending Applications
201
Abandoned Applications
206

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18176667 [patent_doc_number] => 20230037396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => STORAGE RING QUANTUM COMPUTER [patent_app_type] => utility [patent_app_number] => 17/956492 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956492 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956492
Storage ring quantum computer Sep 28, 2022 Issued
Array ( [id] => 20162885 [patent_doc_number] => 12389542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-12 [patent_title] => Semiconductor device and storage system [patent_app_type] => utility [patent_app_number] => 17/952324 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 1146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952324 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952324
Semiconductor device and storage system Sep 25, 2022 Issued
Array ( [id] => 19567535 [patent_doc_number] => 12142312 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Memory control circuit and refresh method for dynamic random access memory array [patent_app_type] => utility [patent_app_number] => 17/944162 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2638 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17944162 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/944162
Memory control circuit and refresh method for dynamic random access memory array Sep 12, 2022 Issued
Array ( [id] => 19918430 [patent_doc_number] => 12293803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Built-in self-test burst patterns based on architecture of memory [patent_app_type] => utility [patent_app_number] => 17/943706 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1262 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943706 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943706
Built-in self-test burst patterns based on architecture of memory Sep 12, 2022 Issued
Array ( [id] => 19037848 [patent_doc_number] => 20240087663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => BUILT-IN SELF-TEST CIRCUITRY [patent_app_type] => utility [patent_app_number] => 17/944135 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17944135 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/944135
Built-in self-test circuitry Sep 12, 2022 Issued
Array ( [id] => 19681450 [patent_doc_number] => 12193340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Switching element and memory device [patent_app_type] => utility [patent_app_number] => 17/943763 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2653 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943763 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943763
Switching element and memory device Sep 12, 2022 Issued
Array ( [id] => 18265832 [patent_doc_number] => 20230087074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => METHOD FOR ACCESSING MEMORY CELLS, CORRESPONDING CIRCUIT AND DATA STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/940753 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940753 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940753
Method for accessing memory cells, corresponding circuit and data storage device Sep 7, 2022 Issued
Array ( [id] => 19679122 [patent_doc_number] => 12190993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Model inversion in integrated circuit devices having analog inference capability [patent_app_type] => utility [patent_app_number] => 17/940935 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 25624 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940935 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940935
Model inversion in integrated circuit devices having analog inference capability Sep 7, 2022 Issued
Array ( [id] => 18112660 [patent_doc_number] => 20230005540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => NON VOLATILE STATIC RANDOM ACCESS MEMORY DEVICE AND CORRESPONDING CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/930250 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14204 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17930250 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/930250
Non volatile static random access memory device and corresponding control method Sep 6, 2022 Issued
Array ( [id] => 18379451 [patent_doc_number] => 20230154540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => STORAGE SYSTEM AND OPERATING METHOD OF STORAGE CONTROLLER [patent_app_type] => utility [patent_app_number] => 17/939021 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939021 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939021
Storage system and operating method of storage controller Sep 6, 2022 Issued
Array ( [id] => 19079272 [patent_doc_number] => 11948647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-02 [patent_title] => Managing digitally-controlled charge pump operation in a memory sub-system [patent_app_type] => utility [patent_app_number] => 17/902130 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8864 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17902130 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/902130
Managing digitally-controlled charge pump operation in a memory sub-system Sep 1, 2022 Issued
Array ( [id] => 18652832 [patent_doc_number] => 20230298672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => MEMORY SYSTEM AND READ METHOD [patent_app_type] => utility [patent_app_number] => 17/899293 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899293 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899293
Memory system and read method Aug 29, 2022 Issued
Array ( [id] => 18455858 [patent_doc_number] => 20230197139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => VOLTAGE GENERATION CIRCUIT AND INTERFACE CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/897067 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17897067 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/897067
Voltage generation circuit and interface circuit Aug 25, 2022 Issued
Array ( [id] => 18974955 [patent_doc_number] => 20240055047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => Burst Read with Flexible Burst Length for On-Chip Memory [patent_app_type] => utility [patent_app_number] => 17/885709 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11287 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17885709 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/885709
Burst read with flexible burst length for on-chip memory Aug 10, 2022 Issued
Array ( [id] => 18974942 [patent_doc_number] => 20240055034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => Dynamic Way-Based Variable Pipeline Architecture for On-Chip Memory [patent_app_type] => utility [patent_app_number] => 17/885747 [patent_app_country] => US [patent_app_date] => 2022-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17885747 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/885747
Dynamic way-based variable pipeline architecture for on-chip memory Aug 10, 2022 Issued
Array ( [id] => 19670650 [patent_doc_number] => 12183417 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Memory device and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 17/882156 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 9532 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882156 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/882156
Memory device and manufacturing method of the same Aug 4, 2022 Issued
Array ( [id] => 19796038 [patent_doc_number] => 12237003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Management of dynamic read voltage sequences in a memory subsystem [patent_app_type] => utility [patent_app_number] => 17/881180 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7179 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881180 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/881180
Management of dynamic read voltage sequences in a memory subsystem Aug 3, 2022 Issued
Array ( [id] => 19926017 [patent_doc_number] => 12300309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 17/881187 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 5789 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881187 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/881187
Memory device Aug 3, 2022 Issued
Array ( [id] => 19626842 [patent_doc_number] => 12165689 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Memory system, refresh control circuit, and refresh control method [patent_app_type] => utility [patent_app_number] => 17/817348 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 8565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17817348 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/817348
Memory system, refresh control circuit, and refresh control method Aug 2, 2022 Issued
Array ( [id] => 19706857 [patent_doc_number] => 12200920 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Integrated circuit devices including a power distribution network and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/816809 [patent_app_country] => US [patent_app_date] => 2022-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7753 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17816809 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/816809
Integrated circuit devices including a power distribution network and methods of forming the same Aug 1, 2022 Issued
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