Search

Zheng B. Song

Examiner (ID: 3906, Phone: (571)272-9402 , Office: P/2875 )

Most Active Art Unit
2875
Art Unit(s)
2875, 2885
Total Applications
872
Issued Applications
597
Pending Applications
74
Abandoned Applications
220

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17318523 [patent_doc_number] => 20210407573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => TECHNIQUES FOR SATURATING A HOST INTERFACE [patent_app_type] => utility [patent_app_number] => 16/917508 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16228 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16917508 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/917508
Techniques for saturating a host interface Jun 29, 2020 Issued
Array ( [id] => 17318568 [patent_doc_number] => 20210407618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => DEVICE, SYSTEM AND METHOD FOR MEMORY REPAIR WITH MULTI-CELL SWITCHING [patent_app_type] => utility [patent_app_number] => 16/912498 [patent_app_country] => US [patent_app_date] => 2020-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16912498 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/912498
Device, system and method for memory repair with multi-cell switching Jun 24, 2020 Issued
Array ( [id] => 16738728 [patent_doc_number] => 10964389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Memory cell [patent_app_type] => utility [patent_app_number] => 16/911049 [patent_app_country] => US [patent_app_date] => 2020-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5402 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16911049 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/911049
Memory cell Jun 23, 2020 Issued
Array ( [id] => 16479350 [patent_doc_number] => 10854303 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Apparatus and methods for determining data states of memory cells [patent_app_type] => utility [patent_app_number] => 16/908832 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 14932 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16908832 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/908832
Apparatus and methods for determining data states of memory cells Jun 22, 2020 Issued
Array ( [id] => 17302760 [patent_doc_number] => 20210398599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => REDUCING PROGRAM VERIFIES FOR MULTI-LEVEL NAND CELLS [patent_app_type] => utility [patent_app_number] => 16/907594 [patent_app_country] => US [patent_app_date] => 2020-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10669 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16907594 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/907594
Reducing program verifies for multi-level NAND cells Jun 21, 2020 Issued
Array ( [id] => 17469980 [patent_doc_number] => 11276462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Techniques for a multi-step current profile for a phase change memory [patent_app_type] => utility [patent_app_number] => 16/903004 [patent_app_country] => US [patent_app_date] => 2020-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9192 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16903004 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/903004
Techniques for a multi-step current profile for a phase change memory Jun 15, 2020 Issued
Array ( [id] => 17277690 [patent_doc_number] => 20210383888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => ERROR CONTROL FOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/895960 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18380 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16895960 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/895960
Error control for memory device Jun 7, 2020 Issued
Array ( [id] => 17210494 [patent_doc_number] => 11170869 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-09 [patent_title] => Dual data protection in storage devices [patent_app_type] => utility [patent_app_number] => 16/893204 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11161 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893204 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/893204
Dual data protection in storage devices Jun 3, 2020 Issued
Array ( [id] => 17181133 [patent_doc_number] => 11158382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-26 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/890849 [patent_app_country] => US [patent_app_date] => 2020-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14885 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16890849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/890849
Semiconductor storage device Jun 1, 2020 Issued
Array ( [id] => 16315840 [patent_doc_number] => 20200294578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => APPARATUSES AND METHODS FOR REFRESH OPERATIONS INCLUDING MULTIPLE REFRESH ACTIVATIONS [patent_app_type] => utility [patent_app_number] => 16/890529 [patent_app_country] => US [patent_app_date] => 2020-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16890529 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/890529
Apparatuses and methods for refresh operations including multiple refresh activations Jun 1, 2020 Issued
Array ( [id] => 17231992 [patent_doc_number] => 20210358549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => PREVENTING PARASITIC CURRENT DURING PROGRAM OPERATIONS IN MEMORY [patent_app_type] => utility [patent_app_number] => 16/876345 [patent_app_country] => US [patent_app_date] => 2020-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16876345 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/876345
Preventing parasitic current during program operations in memory May 17, 2020 Issued
Array ( [id] => 16834954 [patent_doc_number] => 11011212 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-18 [patent_title] => Delay calibration oscillators for a memory device [patent_app_type] => utility [patent_app_number] => 15/930133 [patent_app_country] => US [patent_app_date] => 2020-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 15880 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15930133 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/930133
Delay calibration oscillators for a memory device May 11, 2020 Issued
Array ( [id] => 16958877 [patent_doc_number] => 11062754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Apparatus and methods for refreshing memory [patent_app_type] => utility [patent_app_number] => 16/869359 [patent_app_country] => US [patent_app_date] => 2020-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 6767 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869359 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/869359
Apparatus and methods for refreshing memory May 6, 2020 Issued
Array ( [id] => 16256538 [patent_doc_number] => 20200265913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => STRUCTURE AND METHOD FOR TESTING THREE-DIMENSIONAL MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/867287 [patent_app_country] => US [patent_app_date] => 2020-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10804 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16867287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/867287
Structure and method for testing three-dimensional memory device May 4, 2020 Issued
Array ( [id] => 16487432 [patent_doc_number] => 20200381041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => PSEUDO STATIC RANDOM ACCESS MEMORY AND METHOD FOR WRITING DATA THEREOF [patent_app_type] => utility [patent_app_number] => 16/857199 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4084 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16857199 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/857199
Pseudo static random access memory and method for writing data thereof Apr 23, 2020 Issued
Array ( [id] => 16356228 [patent_doc_number] => 10796745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Temperature informed memory refresh [patent_app_type] => utility [patent_app_number] => 16/855579 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10644 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16855579 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/855579
Temperature informed memory refresh Apr 21, 2020 Issued
Array ( [id] => 16226042 [patent_doc_number] => 20200251159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-06 [patent_title] => STACKED MEMORY DEVICE WITH END TO END DATA BUS INVERSION [patent_app_type] => utility [patent_app_number] => 16/854280 [patent_app_country] => US [patent_app_date] => 2020-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854280 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/854280
STACKED MEMORY DEVICE WITH END TO END DATA BUS INVERSION Apr 20, 2020 Abandoned
Array ( [id] => 16394516 [patent_doc_number] => 20200335457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/851113 [patent_app_country] => US [patent_app_date] => 2020-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16851113 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/851113
Semiconductor device Apr 16, 2020 Issued
Array ( [id] => 17040381 [patent_doc_number] => 20210257017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => COMPUTATION OPERATOR IN MEMORY AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/850016 [patent_app_country] => US [patent_app_date] => 2020-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2955 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16850016 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/850016
Computation operator in memory and operation method thereof Apr 15, 2020 Issued
Array ( [id] => 16920113 [patent_doc_number] => 20210193205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => MEGNETORESISTIVE RANDOM ACCESS MEMORY [patent_app_type] => utility [patent_app_number] => 16/849642 [patent_app_country] => US [patent_app_date] => 2020-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16849642 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/849642
Megnetoresistive random access memory Apr 14, 2020 Issued
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