Search

Zheng Wei

Examiner (ID: 5332, Phone: (571)270-1059 , Office: P/2192 )

Most Active Art Unit
2192
Art Unit(s)
2192
Total Applications
566
Issued Applications
433
Pending Applications
2
Abandoned Applications
135

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17615583 [patent_doc_number] => 20220157863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/514493 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13707 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17514493 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/514493
Semiconductor device Oct 28, 2021 Issued
Array ( [id] => 17417353 [patent_doc_number] => 20220052257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING DATA STORAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/514086 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16469 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17514086 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/514086
Semiconductor device including data storage structure Oct 28, 2021 Issued
Array ( [id] => 18350469 [patent_doc_number] => 20230138580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => CAPACITOR WITH AN ELECTRODE WELL [patent_app_type] => utility [patent_app_number] => 17/452695 [patent_app_country] => US [patent_app_date] => 2021-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17452695 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/452695
Capacitor with an electrode well Oct 27, 2021 Issued
Array ( [id] => 18357942 [patent_doc_number] => 11646349 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Structure of semiconductor device [patent_app_type] => utility [patent_app_number] => 17/511579 [patent_app_country] => US [patent_app_date] => 2021-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2775 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17511579 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/511579
Structure of semiconductor device Oct 26, 2021 Issued
Array ( [id] => 17486238 [patent_doc_number] => 20220093742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/511586 [patent_app_country] => US [patent_app_date] => 2021-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3274 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17511586 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/511586
Method for fabricating semiconductor device Oct 26, 2021 Issued
Array ( [id] => 18520761 [patent_doc_number] => 11710655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Integrated circuit structure with semiconductor-based isolation structure and methods to form same [patent_app_type] => utility [patent_app_number] => 17/505963 [patent_app_country] => US [patent_app_date] => 2021-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5019 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17505963 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/505963
Integrated circuit structure with semiconductor-based isolation structure and methods to form same Oct 19, 2021 Issued
Array ( [id] => 17723517 [patent_doc_number] => 20220216239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/503713 [patent_app_country] => US [patent_app_date] => 2021-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11079 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17503713 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/503713
Semiconductor memory device Oct 17, 2021 Issued
Array ( [id] => 18721591 [patent_doc_number] => 11798948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Semiconductor structure with shared well [patent_app_type] => utility [patent_app_number] => 17/496296 [patent_app_country] => US [patent_app_date] => 2021-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3034 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17496296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/496296
Semiconductor structure with shared well Oct 6, 2021 Issued
Array ( [id] => 18563093 [patent_doc_number] => 11728347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Method of manufacturing an integrated circuit device [patent_app_type] => utility [patent_app_number] => 17/494275 [patent_app_country] => US [patent_app_date] => 2021-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 11568 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17494275 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/494275
Method of manufacturing an integrated circuit device Oct 4, 2021 Issued
Array ( [id] => 18280565 [patent_doc_number] => 20230096037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => CROSS FIELD EFFECT TRANSISTOR LIBRARY CELL ARCHITECTURE DESIGN [patent_app_type] => utility [patent_app_number] => 17/489316 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17489316 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/489316
Cross field effect transistor library cell architecture design Sep 28, 2021 Issued
Array ( [id] => 18874817 [patent_doc_number] => 11862640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Cross field effect transistor (XFET) library architecture power routing [patent_app_type] => utility [patent_app_number] => 17/489276 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6608 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17489276 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/489276
Cross field effect transistor (XFET) library architecture power routing Sep 28, 2021 Issued
Array ( [id] => 17347268 [patent_doc_number] => 20220013599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => ORGANIC LIGHT EMITTING DIODE DISPLAY [patent_app_type] => utility [patent_app_number] => 17/484288 [patent_app_country] => US [patent_app_date] => 2021-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10620 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17484288 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/484288
Organic light emitting diode display Sep 23, 2021 Issued
Array ( [id] => 18267327 [patent_doc_number] => 20230088569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => RADIO-FREQUENCY INTEGRATED CIRCUITS (RFICS) INCLUDING A POROSIFIED SEMICONDUCTOR ISOLATION REGION TO REDUCE NOISE INTERFERENCE AND RELATED FABRICATION METHODS [patent_app_type] => utility [patent_app_number] => 17/482733 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17482733 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/482733
RADIO-FREQUENCY INTEGRATED CIRCUITS (RFICS) INCLUDING A POROSIFIED SEMICONDUCTOR ISOLATION REGION TO REDUCE NOISE INTERFERENCE AND RELATED FABRICATION METHODS Sep 22, 2021 Abandoned
Array ( [id] => 18840242 [patent_doc_number] => 11848324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Efuse inside and gate structure on triple-well region [patent_app_type] => utility [patent_app_number] => 17/483104 [patent_app_country] => US [patent_app_date] => 2021-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2936 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17483104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/483104
Efuse inside and gate structure on triple-well region Sep 22, 2021 Issued
Array ( [id] => 18465902 [patent_doc_number] => 11690214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Dynamic random access memory and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/481772 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 6068 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481772 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/481772
Dynamic random access memory and method for manufacturing the same Sep 21, 2021 Issued
Array ( [id] => 18283684 [patent_doc_number] => 20230099156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => FORMING STACKED NANOSHEET SEMICONDUCTOR DEVICES WITH OPTIMAL CRYSTALLINE ORIENTATIONS AROUND DEVICES [patent_app_type] => utility [patent_app_number] => 17/481353 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481353 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/481353
Forming stacked nanosheet semiconductor devices with optimal crystalline orientations around devices Sep 21, 2021 Issued
Array ( [id] => 17599502 [patent_doc_number] => 20220149076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => MONOLITHIC MULTI-FETS [patent_app_type] => utility [patent_app_number] => 17/478311 [patent_app_country] => US [patent_app_date] => 2021-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14537 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17478311 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/478311
Monolithic multi-FETS Sep 16, 2021 Issued
Array ( [id] => 19063162 [patent_doc_number] => 11942414 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Integrated circuits (ICs) employing directly coupled metal lines between vertically-adjacent interconnect layers for reduced coupling resistance, and related methods [patent_app_type] => utility [patent_app_number] => 17/478539 [patent_app_country] => US [patent_app_date] => 2021-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 45 [patent_no_of_words] => 25762 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17478539 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/478539
Integrated circuits (ICs) employing directly coupled metal lines between vertically-adjacent interconnect layers for reduced coupling resistance, and related methods Sep 16, 2021 Issued
Array ( [id] => 18639672 [patent_doc_number] => 11764298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => VTFET with buried power rails [patent_app_type] => utility [patent_app_number] => 17/477532 [patent_app_country] => US [patent_app_date] => 2021-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 45 [patent_no_of_words] => 7805 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17477532 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/477532
VTFET with buried power rails Sep 16, 2021 Issued
Array ( [id] => 17339403 [patent_doc_number] => 20220005734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => SEMICONDUCTOR STRUCTURE IMPLEMENTING SERIES-CONNECTED TRANSISTOR AND RESISTOR AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/477051 [patent_app_country] => US [patent_app_date] => 2021-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8520 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17477051 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/477051
Semiconductor structure implementing series-connected transistor and resistor and method for forming the same Sep 15, 2021 Issued
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