Zheng Wei

Array ( [id] => 9832272 [patent_doc_number] => 08941090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-27 [patent_title] => 'Resistive memory device, method of fabricating the same, and memory apparatus and data processing system having the same' [patent_app_type] => utility [patent_app_number] => 13/719733 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3479 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719733 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9188884 [patent_doc_number] => 20130328199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'SEMICONDUCTOR DEVICE WITH SPACERS FOR CAPPING AIR GAPS AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/720199 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3821 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720199 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9542620 [patent_doc_number] => 20140167267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'METHOD AND STRUCTURES FOR HEAT DISSIPATING INTERPOSERS' [patent_app_type] => utility [patent_app_number] => 13/720346 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6844 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720346 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8880911 [patent_doc_number] => 20130154095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'SEMICONDUCTOR DEVICES CONNECTED BY ANISOTROPIC CONDUCTIVE FILM COMPRISING CONDUCTIVE MICROSPHERES' [patent_app_type] => utility [patent_app_number] => 13/720051 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10370 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720051 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9039980 [patent_doc_number] => 20130242618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'COMPOUND SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/720349 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6504 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8901171 [patent_doc_number] => 20130168674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'Methods and Systems for Repairing Interior Device Layers in Three-Dimensional Integrated Circuits' [patent_app_type] => utility [patent_app_number] => 13/719724 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3132 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719724 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8888636 [patent_doc_number] => 20130161820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'METHOD FOR BONDING TWO SILICON SUBSTRATES, AND A CORRESPONDEING SYSTEM OF TWO SILICON SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 13/719799 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2502 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719799 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10604339 [patent_doc_number] => 09324911 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Methods of fabricating dilute nitride semiconductor materials for use in photoactive devices and related structures' [patent_app_type] => utility [patent_app_number] => 13/720284 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5837 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720284 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9542626 [patent_doc_number] => 20140167273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'LOW PARASITIC PACKAGE SUBSTRATE HAVING EMBEDDED PASSIVE SUBSTRATE DISCRETE COMPONENTS AND METHOD FOR MAKING SAME' [patent_app_type] => utility [patent_app_number] => 13/719984 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11366 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719984 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11802302 [patent_doc_number] => 09543197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Package with dielectric or anisotropic conductive (ACF) buildup layer' [patent_app_type] => utility [patent_app_number] => 13/719836 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 6441 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719836 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8914082 [patent_doc_number] => 20130175707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'SUBSTRATE STRUCTURE, SEMICONDUCTOR PACKAGE DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/720353 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5269 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9542436 [patent_doc_number] => 20140167083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'LED PACKAGE WITH INTEGRATED REFLECTIVE SHIELD ON ZENER DIODE' [patent_app_type] => utility [patent_app_number] => 13/720401 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9327892 [patent_doc_number] => 20140054674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'NONVOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/720362 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3809 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720362 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9542571 [patent_doc_number] => 20140167218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'CIRCUIT CONFIGURATION AND MANUFACTURING PROCESSES FOR VERTICAL TRANSIENT VOLTAGE SUPPRESSOR (TVS) AND EMI FILTER' [patent_app_type] => utility [patent_app_number] => 13/720042 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5768 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9195282 [patent_doc_number] => 20130334597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'POWER SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/720344 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720344 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9827754 [patent_doc_number] => 08936982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-20 [patent_title] => 'Semiconductor device with buried bit line and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/720109 [patent_app_country] => US [patent_app_date] => 2012-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 33 [patent_no_of_words] => 11914 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13720109 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10022461 [patent_doc_number] => 09064956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'Semiconductor device having buried gate, method of fabricating the same, and module and system having the same' [patent_app_type] => utility [patent_app_number] => 13/719002 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 7121 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719002 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10557148 [patent_doc_number] => 09281353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-08 [patent_title] => 'Organic thin film transistor array substrate, method for manufacturing the same and display device' [patent_app_type] => utility [patent_app_number] => 13/824540 [patent_app_country] => US [patent_app_date] => 2012-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5879 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13824540 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9542521 [patent_doc_number] => 20140167168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'Ultrananocrystalline Diamond Films With Optimized Dielectric Properties For Advanced RF MEMS Capacitive Switches' [patent_app_type] => utility [patent_app_number] => 13/708401 [patent_app_country] => US [patent_app_date] => 2012-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10352 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13708401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8730140 [patent_doc_number] => 20130075709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'Light Emitting Device and Electronic Equipment' [patent_app_type] => utility [patent_app_number] => 13/677567 [patent_app_country] => US [patent_app_date] => 2012-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 24047 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13677567 [rel_patent_id] =>[rel_patent_doc_number] =>)