Search

Zhihan Zhou

Examiner (ID: 9641, Phone: (571)270-7284 , Office: P/2482 )

Most Active Art Unit
2482
Art Unit(s)
2482
Total Applications
1130
Issued Applications
848
Pending Applications
107
Abandoned Applications
208

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18024027 [patent_doc_number] => 20220375526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => ANALOG CONTENT-ADDRESS MEMORY AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/325244 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5553 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17325244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/325244
Analog content-address memory and operation method thereof May 19, 2021 Issued
Array ( [id] => 17615112 [patent_doc_number] => 20220157392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => MEMORY CIRCUIT AND MEMORY PROGRAMMING METHOD [patent_app_type] => utility [patent_app_number] => 17/326294 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326294 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/326294
Memory circuit and memory programming method May 19, 2021 Issued
Array ( [id] => 17566324 [patent_doc_number] => 20220130473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/245699 [patent_app_country] => US [patent_app_date] => 2021-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17245699 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/245699
Memory device and method of operating the memory device Apr 29, 2021 Issued
Array ( [id] => 18781985 [patent_doc_number] => 11823750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => One-time programmable memory and method for verification and access [patent_app_type] => utility [patent_app_number] => 17/244450 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7066 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17244450 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/244450
One-time programmable memory and method for verification and access Apr 28, 2021 Issued
Array ( [id] => 18131137 [patent_doc_number] => 11557352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Adjustable read retry order based on decoding success trend [patent_app_type] => utility [patent_app_number] => 17/244794 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 12780 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17244794 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/244794
Adjustable read retry order based on decoding success trend Apr 28, 2021 Issued
Array ( [id] => 17862637 [patent_doc_number] => 11443798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-13 [patent_title] => High voltage switch with mitigated gate stress [patent_app_type] => utility [patent_app_number] => 17/244501 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 18325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17244501 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/244501
High voltage switch with mitigated gate stress Apr 28, 2021 Issued
Array ( [id] => 18047711 [patent_doc_number] => 11521669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Semiconductor device having cam that stores address signals [patent_app_type] => utility [patent_app_number] => 17/301533 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5187 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17301533 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/301533
Semiconductor device having cam that stores address signals Apr 5, 2021 Issued
Array ( [id] => 18639265 [patent_doc_number] => 11763881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Computational memory cell and processing array device using the memory cells for XOR and XNOR computations [patent_app_type] => utility [patent_app_number] => 17/221565 [patent_app_country] => US [patent_app_date] => 2021-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6329 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17221565 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/221565
Computational memory cell and processing array device using the memory cells for XOR and XNOR computations Apr 1, 2021 Issued
Array ( [id] => 16981199 [patent_doc_number] => 20210225436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => COMPUTATIONAL MEMORY CELL AND PROCESSING ARRAY DEVICE USING THE MEMORY CELLS FOR XOR AND XNOR COMPUTATIONS [patent_app_type] => utility [patent_app_number] => 17/221558 [patent_app_country] => US [patent_app_date] => 2021-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17221558 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/221558
COMPUTATIONAL MEMORY CELL AND PROCESSING ARRAY DEVICE USING THE MEMORY CELLS FOR XOR AND XNOR COMPUTATIONS Apr 1, 2021 Abandoned
Array ( [id] => 17416823 [patent_doc_number] => 20220051727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => NON-VOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, CONTROLLER FOR CONTROLLING THE SAME, AND STORAGE DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/220218 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220218 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220218
Non-volatile memory device, operating method thereof, controller for controlling the same, and storage device including the same Mar 31, 2021 Issued
Array ( [id] => 17862645 [patent_doc_number] => 11443806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Nonvolatile memory and method of operating nonvolatile memory [patent_app_type] => utility [patent_app_number] => 17/215614 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 10676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17215614 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/215614
Nonvolatile memory and method of operating nonvolatile memory Mar 28, 2021 Issued
Array ( [id] => 17893072 [patent_doc_number] => 11456051 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-27 [patent_title] => Optimized storage charge loss management [patent_app_type] => utility [patent_app_number] => 17/212531 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 8409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212531 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212531
Optimized storage charge loss management Mar 24, 2021 Issued
Array ( [id] => 18757224 [patent_doc_number] => 20230360682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => TECHNIQUES TO MITIGATE MEMORY DIE MISALIGNMENT [patent_app_type] => utility [patent_app_number] => 17/629600 [patent_app_country] => US [patent_app_date] => 2021-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17629600 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/629600
Techniques to mitigate memory die misalignment Mar 17, 2021 Issued
Array ( [id] => 17283914 [patent_doc_number] => 11200954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Programming nonvolatile memory cells through a series of predetermined threshold voltages [patent_app_type] => utility [patent_app_number] => 17/204631 [patent_app_country] => US [patent_app_date] => 2021-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 31 [patent_no_of_words] => 20462 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17204631 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/204631
Programming nonvolatile memory cells through a series of predetermined threshold voltages Mar 16, 2021 Issued
Array ( [id] => 18669741 [patent_doc_number] => 11776651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Controlling memory including managing a correction value table [patent_app_type] => utility [patent_app_number] => 17/202432 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 47 [patent_no_of_words] => 32570 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202432 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/202432
Controlling memory including managing a correction value table Mar 15, 2021 Issued
Array ( [id] => 18088397 [patent_doc_number] => 11538536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Semiconductor memory device having insulating layers disposed between a plurality of memory string structures [patent_app_type] => utility [patent_app_number] => 17/199718 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 41 [patent_no_of_words] => 13967 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 393 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199718 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199718
Semiconductor memory device having insulating layers disposed between a plurality of memory string structures Mar 11, 2021 Issued
Array ( [id] => 16904536 [patent_doc_number] => 20210183452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => MEMORY DEVICES FOR COMPARING INPUT DATA TO DATA STORED IN MEMORY CELLS COUPLED TO A DATA LINE [patent_app_type] => utility [patent_app_number] => 17/189529 [patent_app_country] => US [patent_app_date] => 2021-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189529 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/189529
Memory devices for comparing input data to data stored in memory cells coupled to a data line Mar 1, 2021 Issued
Array ( [id] => 17840494 [patent_doc_number] => 20220277800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-01 [patent_title] => MEMORY SYSTEM WITH REDUNDANT OPERATION [patent_app_type] => utility [patent_app_number] => 17/187979 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17187979 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/187979
MEMORY SYSTEM WITH REDUNDANT OPERATION Feb 28, 2021 Pending
Array ( [id] => 17691863 [patent_doc_number] => 20220199156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => Detection Of Page Discrepancy During Read Threshold Calibration [patent_app_type] => utility [patent_app_number] => 17/184536 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8543 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184536 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/184536
Detection of page discrepancy during read threshold calibration Feb 23, 2021 Issued
Array ( [id] => 16889043 [patent_doc_number] => 20210175240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => VIRTUAL GROUND NON-VOLATILE MEMORY ARRAY [patent_app_type] => utility [patent_app_number] => 17/178520 [patent_app_country] => US [patent_app_date] => 2021-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17178520 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/178520
Virtual ground non-volatile memory array Feb 17, 2021 Issued
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