Search

Zhuo H. Li

Examiner (ID: 15574, Phone: (571)272-4183 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2185, 2133, 2186, 2189
Total Applications
846
Issued Applications
701
Pending Applications
71
Abandoned Applications
85

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20152041 [patent_doc_number] => 20250251879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => DATA PROCESSING APPARATUS AND METHOD FOR ZSWAP ACCELERATION [patent_app_type] => utility [patent_app_number] => 19/191842 [patent_app_country] => US [patent_app_date] => 2025-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19191842 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/191842
DATA PROCESSING APPARATUS AND METHOD FOR ZSWAP ACCELERATION Apr 27, 2025 Pending
Array ( [id] => 20152202 [patent_doc_number] => 20250252040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => METHODS AND APPARATUS TO EXECUTE MEMORY ACCESS FORMULAS IN MEMORY CHIPLETS [patent_app_type] => utility [patent_app_number] => 19/186293 [patent_app_country] => US [patent_app_date] => 2025-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19186293 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/186293
METHODS AND APPARATUS TO EXECUTE MEMORY ACCESS FORMULAS IN MEMORY CHIPLETS Apr 21, 2025 Pending
Array ( [id] => 20365770 [patent_doc_number] => 20250355582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-20 [patent_title] => MEMORY SYSTEM INITIALIZATION TRIGGER [patent_app_type] => utility [patent_app_number] => 19/185033 [patent_app_country] => US [patent_app_date] => 2025-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6245 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19185033 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/185033
MEMORY SYSTEM INITIALIZATION TRIGGER Apr 20, 2025 Pending
Array ( [id] => 20195284 [patent_doc_number] => 20250271994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => SRAM-BASED CELL FOR IN-MEMORY COMPUTING AND HYBRID COMPUTATIONS/STORAGE MEMORY ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 19/074595 [patent_app_country] => US [patent_app_date] => 2025-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19074595 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/074595
SRAM-BASED CELL FOR IN-MEMORY COMPUTING AND HYBRID COMPUTATIONS/STORAGE MEMORY ARCHITECTURE Mar 9, 2025 Pending
Array ( [id] => 20234398 [patent_doc_number] => 20250291717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => LOGICAL TO PHYSICAL MEMORY ADDRESS MAPPING USING BITMAPS [patent_app_type] => utility [patent_app_number] => 19/070291 [patent_app_country] => US [patent_app_date] => 2025-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3487 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19070291 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/070291
LOGICAL TO PHYSICAL MEMORY ADDRESS MAPPING USING BITMAPS Mar 3, 2025 Pending
Array ( [id] => 20249874 [patent_doc_number] => 20250298743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => ADVANCED FILE SYSTEM WITH DYNAMIC BLOCK ALLOCATION [patent_app_type] => utility [patent_app_number] => 19/067399 [patent_app_country] => US [patent_app_date] => 2025-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4032 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19067399 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/067399
ADVANCED FILE SYSTEM WITH DYNAMIC BLOCK ALLOCATION Feb 27, 2025 Pending
Array ( [id] => 20513348 [patent_doc_number] => 20260037449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => DATA STORAGE DEVICE TO EFFICIENTLY MANAGE MAP DATA AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 19/046543 [patent_app_country] => US [patent_app_date] => 2025-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1118 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19046543 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/046543
DATA STORAGE DEVICE TO EFFICIENTLY MANAGE MAP DATA AND METHOD OF OPERATING THE SAME Feb 5, 2025 Pending
Array ( [id] => 20922933 [patent_doc_number] => 12717996 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2026-08-25 [patent_title] => Multi-chip module (MCM) with multi-port unified memory [patent_app_type] => utility [patent_app_number] => 19/026279 [patent_app_country] => US [patent_app_date] => 2025-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 1123 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19026279 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/026279
MULTI-CHIP MODULE (MCM) WITH MULTI-PORT UNIFIED MEMORY Jan 15, 2025 Pending
Array ( [id] => 20811882 [patent_doc_number] => 20260186707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-07-02 [patent_title] => Sub Block Access via Storage Access Commands and Memory Access Instructions [patent_app_type] => utility [patent_app_number] => 19/008292 [patent_app_country] => US [patent_app_date] => 2025-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19008292 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/008292
Sub Block Access via Storage Access Commands and Memory Access Instructions Jan 1, 2025 Pending
Array ( [id] => 20805197 [patent_doc_number] => 12670104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => Deduplication of refresh entries in a multi-consumer versioning system [patent_app_type] => utility [patent_app_number] => 18/986123 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7233 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18986123 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/986123
Deduplication of refresh entries in a multi-consumer versioning system Dec 17, 2024 Issued
Array ( [id] => 20221469 [patent_doc_number] => 20250284400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => READ CACHING FOR A SUBSEQUENT READ OPERATION [patent_app_type] => utility [patent_app_number] => 18/985001 [patent_app_country] => US [patent_app_date] => 2024-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985001 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985001
READ CACHING FOR A SUBSEQUENT READ OPERATION Dec 16, 2024 Pending
Array ( [id] => 20976419 [patent_doc_number] => 12737115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-15 [patent_title] => Workload-aware memory reclamation on graph databases [patent_app_type] => utility [patent_app_number] => 18/977223 [patent_app_country] => US [patent_app_date] => 2024-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1227 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18977223 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/977223
WORKLOAD-AWARE MEMORY RECLAMATION ON GRAPH DATABASES Dec 10, 2024 Pending
Array ( [id] => 20805031 [patent_doc_number] => 12669938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => Systems, methods, and media for controlling background wear leveling in solid-state drives [patent_app_type] => utility [patent_app_number] => 18/962759 [patent_app_country] => US [patent_app_date] => 2024-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 0 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18962759 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/962759
Systems, methods, and media for controlling background wear leveling in solid-state drives Nov 26, 2024 Issued
Array ( [id] => 19850357 [patent_doc_number] => 20250095708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => APPARATUSES AND METHODS FOR OPERATIONS IN A SELF-REFRESH STATE [patent_app_type] => utility [patent_app_number] => 18/961097 [patent_app_country] => US [patent_app_date] => 2024-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16875 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18961097 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/961097
APPARATUSES AND METHODS FOR OPERATIONS IN A SELF-REFRESH STATE Nov 25, 2024 Pending
Array ( [id] => 19787222 [patent_doc_number] => 20250060901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => Methods for Gather/Scatter Operations in a Vector Processor [patent_app_type] => utility [patent_app_number] => 18/938806 [patent_app_country] => US [patent_app_date] => 2024-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10101 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18938806 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/938806
Methods for Gather/Scatter Operations in a Vector Processor Nov 5, 2024 Pending
Array ( [id] => 20790014 [patent_doc_number] => 12663929 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => Dynamic management of a memory firewall [patent_app_type] => utility [patent_app_number] => 18/932199 [patent_app_country] => US [patent_app_date] => 2024-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18932199 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/932199
Dynamic management of a memory firewall Oct 29, 2024 Issued
Array ( [id] => 20422838 [patent_doc_number] => 20250384923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => MEMORY CIRCUITS WITH WORD LINE ASSISTANCE CIRCUITS AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/923010 [patent_app_country] => US [patent_app_date] => 2024-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18923010 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/923010
MEMORY CIRCUITS WITH WORD LINE ASSISTANCE CIRCUITS AND METHODS FOR OPERATING THE SAME Oct 21, 2024 Pending
Array ( [id] => 19725736 [patent_doc_number] => 20250028487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => MEMORY DEVICES INCLUDING IDLE TIME PREDICTION [patent_app_type] => utility [patent_app_number] => 18/906236 [patent_app_country] => US [patent_app_date] => 2024-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8094 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18906236 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/906236
MEMORY DEVICES INCLUDING IDLE TIME PREDICTION Oct 3, 2024 Pending
Array ( [id] => 20977614 [patent_doc_number] => 12738318 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-15 [patent_title] => SGS voltage in unselected blocks during program [patent_app_type] => utility [patent_app_number] => 18/905292 [patent_app_country] => US [patent_app_date] => 2024-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 37 [patent_no_of_words] => 14788 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18905292 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/905292
SGS VOLTAGE IN UNSELECTED BLOCKS DURING PROGRAM Oct 2, 2024 Pending
Array ( [id] => 19864423 [patent_doc_number] => 20250103209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => MEMORY SYSTEM, OPERATING METHOD OF MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY CONTROLLER [patent_app_type] => utility [patent_app_number] => 18/891579 [patent_app_country] => US [patent_app_date] => 2024-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18891579 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/891579
MEMORY SYSTEM, OPERATING METHOD OF MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY CONTROLLER Sep 19, 2024 Pending
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