Search

Zhuo H. Li

Examiner (ID: 16500, Phone: (571)272-4183 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2185, 2189, 2186, 2133
Total Applications
817
Issued Applications
685
Pending Applications
71
Abandoned Applications
83

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18350401 [patent_doc_number] => 20230138512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => High Performance, High Capacity Memory Modules and Systems [patent_app_type] => utility [patent_app_number] => 17/989838 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989838 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989838
High performance, high capacity memory modules and systems Nov 17, 2022 Issued
Array ( [id] => 19610168 [patent_doc_number] => 12159043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Dynamic management of a memory firewall [patent_app_type] => utility [patent_app_number] => 17/989389 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989389 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989389
Dynamic management of a memory firewall Nov 16, 2022 Issued
Array ( [id] => 19084636 [patent_doc_number] => 20240111437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => MEMORY ALLOCATION BASED ON LIFESPAN [patent_app_type] => utility [patent_app_number] => 17/957406 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4470 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17957406 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/957406
Memory allocation based on lifespan Sep 29, 2022 Issued
Array ( [id] => 19523012 [patent_doc_number] => 12124739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Memory devices including idle time prediction [patent_app_type] => utility [patent_app_number] => 17/949333 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 26 [patent_no_of_words] => 8077 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949333 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/949333
Memory devices including idle time prediction Sep 20, 2022 Issued
Array ( [id] => 18139486 [patent_doc_number] => 20230013322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => SOLID STATE DRIVE MANAGEMENT METHOD AND SOLID STATE DRIVE [patent_app_type] => utility [patent_app_number] => 17/933857 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10414 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933857 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/933857
Solid state drive management method and solid state drive Sep 20, 2022 Issued
Array ( [id] => 19905650 [patent_doc_number] => 12282657 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Dynamic and shared CMB and HMB allocation [patent_app_type] => utility [patent_app_number] => 17/949132 [patent_app_country] => US [patent_app_date] => 2022-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 1086 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949132 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/949132
Dynamic and shared CMB and HMB allocation Sep 19, 2022 Issued
Array ( [id] => 19610156 [patent_doc_number] => 12159031 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Method and apparatus for returning memory [patent_app_type] => utility [patent_app_number] => 17/943901 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6475 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943901 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943901
Method and apparatus for returning memory Sep 12, 2022 Issued
Array ( [id] => 18270864 [patent_doc_number] => 20230092106 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SYSTEM AND METHOD FOR LOGICAL DELETION OF STORED DATA OBJECTS [patent_app_type] => utility [patent_app_number] => 17/929650 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17929650 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/929650
System and method for logical deletion of stored data objects Sep 1, 2022 Issued
Array ( [id] => 19005650 [patent_doc_number] => 20240069721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => MEMORY WITH SWITCHABLE CHANNELS [patent_app_type] => utility [patent_app_number] => 17/823909 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17823909 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/823909
MEMORY WITH SWITCHABLE CHANNELS Aug 30, 2022 Pending
Array ( [id] => 19355942 [patent_doc_number] => 12056388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Adjustable function-in-memory computation system [patent_app_type] => utility [patent_app_number] => 17/898207 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17898207 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/898207
Adjustable function-in-memory computation system Aug 28, 2022 Issued
Array ( [id] => 19811332 [patent_doc_number] => 12242726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Capability messaging for memory operations across banks with multiple page access [patent_app_type] => utility [patent_app_number] => 17/892539 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 19235 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892539 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892539
Capability messaging for memory operations across banks with multiple page access Aug 21, 2022 Issued
Array ( [id] => 19514049 [patent_doc_number] => 20240345735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => LOW LATENCY DYNAMIC RANDOM ACCESS MEMORY (DRAM) ARCHITECTURE WITH DEDICATED READ-WRITE DATA PATHS [patent_app_type] => utility [patent_app_number] => 18/681716 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6206 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18681716 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/681716
LOW LATENCY DYNAMIC RANDOM ACCESS MEMORY (DRAM) ARCHITECTURE WITH DEDICATED READ-WRITE DATA PATHS Aug 7, 2022 Pending
Array ( [id] => 18007109 [patent_doc_number] => 20220365875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => EFFICIENT DATA STORAGE BY GROUPING SIMILAR DATA WITHIN A ZONE [patent_app_type] => utility [patent_app_number] => 17/877737 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 41087 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877737 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877737
Efficient data storage by grouping similar data within a zone Jul 28, 2022 Issued
Array ( [id] => 18925240 [patent_doc_number] => 20240028244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => METHODS OF OPERATING MEMORY SYSTEMS WITH INPUT/OUTPUT EXPANDERS FOR MULTI-CHANNEL STATUS READS, AND ASSOCIATED SYSTEMS AND DEVICES [patent_app_type] => utility [patent_app_number] => 17/873046 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873046
METHODS OF OPERATING MEMORY SYSTEMS WITH INPUT/OUTPUT EXPANDERS FOR MULTI-CHANNEL STATUS READS, AND ASSOCIATED SYSTEMS AND DEVICES Jul 24, 2022 Pending
Array ( [id] => 18925240 [patent_doc_number] => 20240028244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => METHODS OF OPERATING MEMORY SYSTEMS WITH INPUT/OUTPUT EXPANDERS FOR MULTI-CHANNEL STATUS READS, AND ASSOCIATED SYSTEMS AND DEVICES [patent_app_type] => utility [patent_app_number] => 17/873046 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873046
METHODS OF OPERATING MEMORY SYSTEMS WITH INPUT/OUTPUT EXPANDERS FOR MULTI-CHANNEL STATUS READS, AND ASSOCIATED SYSTEMS AND DEVICES Jul 24, 2022 Pending
Array ( [id] => 18925240 [patent_doc_number] => 20240028244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => METHODS OF OPERATING MEMORY SYSTEMS WITH INPUT/OUTPUT EXPANDERS FOR MULTI-CHANNEL STATUS READS, AND ASSOCIATED SYSTEMS AND DEVICES [patent_app_type] => utility [patent_app_number] => 17/873046 [patent_app_country] => US [patent_app_date] => 2022-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873046
METHODS OF OPERATING MEMORY SYSTEMS WITH INPUT/OUTPUT EXPANDERS FOR MULTI-CHANNEL STATUS READS, AND ASSOCIATED SYSTEMS AND DEVICES Jul 24, 2022 Pending
Array ( [id] => 18949659 [patent_doc_number] => 11892952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => No-locality hint vector memory access processors, methods, systems, and instructions [patent_app_type] => utility [patent_app_number] => 17/867673 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 28 [patent_no_of_words] => 25212 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17867673 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/867673
No-locality hint vector memory access processors, methods, systems, and instructions Jul 17, 2022 Issued
Array ( [id] => 18663202 [patent_doc_number] => 20230309227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => COMPRESSION ATTACHED MEMORY MODULE (CAMM) FOR LOW-POWER DOUBLE DATA RAGE (LPDDR) MEMORIES [patent_app_type] => utility [patent_app_number] => 17/861856 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17861856 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/861856
Compression attached memory module (CAMM) for low-power double data rate (LPDDR) memories Jul 10, 2022 Issued
Array ( [id] => 17962027 [patent_doc_number] => 20220342608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => Controller for Quality Of Service Based Arbitrations [patent_app_type] => utility [patent_app_number] => 17/860318 [patent_app_country] => US [patent_app_date] => 2022-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17860318 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/860318
Controller for quality of service based arbitrations Jul 7, 2022 Issued
Array ( [id] => 17962026 [patent_doc_number] => 20220342607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => Controller for Quality Of Service Based Arbitrations [patent_app_type] => utility [patent_app_number] => 17/860203 [patent_app_country] => US [patent_app_date] => 2022-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17860203 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/860203
Controller for quality of service based arbitrations Jul 7, 2022 Issued
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