Method and apparatus for the reduction of time interval error in a phase locked loop circuit | Patent Number 05457428

US 05457428 NA
Application Number8164607
Publication Number-
Pendency1 year, 10 months, 5 days
Filled DateDec 9, 1993
Priority DateDec 9, 1993
Publication Date-
Expiration DateDec 9, 2013
Inventor/Applicants John M. Alder
Hendricus M. H. Bontekoe
ExaminesKINKEAD, ARNOLD M
Art Unit2502
Technology Center2500
Assignments
At&t Company
Current
At&t ServicesAt&t Company
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