Circuit arrangement for the analogue suppression of echoes | Patent Number 07151828
US 07151828 B2Filled DateFeb 16, 2001
Priority DateFeb 16, 2001
Publication DateSep 18, 2003
Expiration DateDec 19, 2018
Inventor/ApplicantsThomas Eichler
Thomas Blon
Thomas Blon
Martin Gropl
Martin Gröpl
Peter Laaser
Peter Laaser
Thomas Eichler
Thomas Blon
Thomas Blon
Martin Gropl
Martin Gröpl
Peter Laaser
Peter Laaser
Thomas Eichler
ExaminesSINGH, RAMNANDAN P
Art Unit2614
Technology Center2600
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