Power mesh arrangement method utilized in an integrated circuit having multiple power domains | Patent Number 08006218

US 08006218 B2
Application Number12271534
Publication NumberUS 20090132988 A1
Pendency2 years, 9 months, 12 days
Filled DateNov 14, 2008
Priority DateNov 14, 2008
Publication DateMay 21, 2009
Expiration DateNov 13, 2028
Inventor/ApplicantsChia-Lin Chuang
ExaminesLEVIN, NAUM B
Art Unit2825
Technology Center2800
Assignments
Realtek Semiconductor
Current
Realtek Semiconductor
Original
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