I/R receiver with duty cycle synchronized power reduction | Patent Number 08948611

US 08948611 B1
Application Number13485906
Publication Number-
Pendency2 years, 8 months, 8 days
Filled DateMay 31, 2012
Priority DateMay 31, 2012
Publication Date-
Expiration DateMay 30, 2032
Inventor/ApplicantsLuiz Antonio Razera, Jr.
Andrew Gerald Zocher
Richard Dean Davis
Theron Lee Jones
ExaminesTRAN, DZUNG D
Art Unit2634
Technology Center2600
Assignments
Maxim Integrated
Current
Maxim IntegratedAnalog Devices
Original
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