Systems and methods for using a phase locked loop (PLL) to provide multiple output signals | Patent Number 10523222
US 10523222 B1Filled DateJun 24, 2019
Priority DateSep 24, 2018
Publication Date-
Expiration DateSep 23, 2038
Inventor/ApplicantsGuy Lupescu
Pavel Rozenbaum
Pavel Rozenbaum
ExaminesDOBSON, DANIEL G
Art Unit2636
Technology Center2600
Law Firm
You must be logged in to view
LoginAttorneys
Subscription-Only
View Concierge ProgramEmpower your practice with Patexia Publication Prosecution IP Module.
Get access to our exclusive rankings and unlock powerful data.
Looking for a Publication Attorney?
Get in touch with our team or create your account to start exploring a
network of over 120K attorneys.