System-on-chip having secure debug mode | Patent Number 11280829
US 11280829 B1Filled DateDec 19, 2019
Priority DateDec 19, 2019
Publication Date-
Expiration DateDec 18, 2039
Inventor/ApplicantsKrishna C. Patakamuri
Edward S. Peterson
Ramakrishna G. Poolla
Jason J. Moore
James D. Wesselkamper
Steven E. McNeil
Edward S. Peterson
Ramakrishna G. Poolla
Jason J. Moore
James D. Wesselkamper
Steven E. McNeil
ExaminesJAMSHIDI, GHODRAT
Art Unit2493
Technology Center2400
Assignments
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