Scheduling processing of machine learning tasks on heterogeneous compute circuits | Patent Number 11561826
US 11561826 B1Filled DateNov 12, 2020
Priority DateNov 12, 2020
Publication Date-
Expiration DateNov 11, 2040
Inventor/ApplicantsVishal Jain
Sumit Nagpal
Abid Karumannil
Arun Kumar Patil
Sumit Nagpal
Abid Karumannil
Arun Kumar Patil
ExaminesRASHID, WISSAM
Art Unit2195
Technology Center2100
Law Firm
You must be logged in to view
LoginAttorneys
Subscription-Only
View Concierge ProgramEmpower your practice with Patexia Publication Prosecution IP Module.
Get access to our exclusive rankings and unlock powerful data.
Looking for a Publication Attorney?
Get in touch with our team or create your account to start exploring a
network of over 120K attorneys.