Integrated circuit with mixed row heights | Patent Number 11769766

US 11769766 B2
Application Number17585402
Publication NumberUS 20220149033 A1
Pendency1 year, 8 months, 3 days
Filled DateJan 26, 2022
Priority DateNov 28, 2017
Publication DateMay 12, 2022
Expiration DateNov 27, 2037
Inventor/ApplicantsKam-Tou Sio
Chung-Hsing Wang
Jiann-Tyng Tzeng
Jiann-Tyng TZENG
Yi-Kan CHENG
Chung-Hsing WANG
Yi-Kan Cheng
Kam-Tou SIO
ExaminesPRASAD, NEIL R
Art Unit2897
Technology Center2800
Assignments
Taiwan Semiconductor Manufacturing Company
Current
Taiwan Semiconductor Manufacturing Company
Original
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