Stimulated circuits and fault testing methods | Patent Number 11852685

US 11852685 B2
Application Number17571033
Publication NumberUS 20230221369 A1
Pendency1 year, 11 months, 23 days
Filled DateJan 7, 2022
Priority DateJan 7, 2022
Publication DateJul 13, 2023
Expiration DateJan 6, 2042
Inventor/ApplicantsChristopher Blazer
Brian Ross
ExaminesIQBAL, NADEEM
Art Unit2114
Technology Center2100
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