Built-in self test circuit for measuring phase noise of a phase locked loop | Patent Publication Number 20220260634
US 20220260634 A1Patent NumberUS 11555851 B2
Application Number17736904
Filled DateMay 4, 2022
Priority DateOct 31, 2018
Publication DateAug 18, 2022
Original AssigneeTaiwan Semiconductor Manufacturing Company
Current AssigneeTaiwan Semiconductor Manufacturing Company
Inventor/ApplicantsMao-Hsuan CHOU
Ya-Tin CHANG
Ruey-Bin SHEEN
Ya-Tin Chang
Mao-Hsuan Chou
Ruey-Bin Sheen
Chih-Hsien Chang
Chih-Hsien CHANG
Ya-Tin CHANG
Ruey-Bin SHEEN
Ya-Tin Chang
Mao-Hsuan Chou
Ruey-Bin Sheen
Chih-Hsien Chang
Chih-Hsien CHANG
Empower your practice with Patexia Publication Prosecution IP Module.
Get access to our exclusive rankings and unlock powerful data.
Looking for a Publication Attorney?
Get in touch with our team or create your account to start exploring a
network of over 120K attorneys.