| Biography | Dr Javed G S is an Analog IC designer with experience in design, layout and characterization of Integrated Sensor Interface Circuits for capacitance sensors. He is also an active speaker and motivator on Technical Writing, Research Methodologies and Spirit of Entrepreneurship. He was inducted into IEEE Eta Kappa Nu society by the Mu Xi Chapter - only the 2nd in India and 3rd in IEEE Region 10. He was elevated to a Senior Member of IEEE in 2017.
He received his M.Tech (Research) and Ph.D from the Indian Institute of Science (IISc), Bangalore in 2016. He worked on low power integrated instrumentation circuits for sensing applications.
From August 2008 to July 2010, he worked with Integrated Circuit Design Center (ICDC), Semiconductor Division, Bharat Electronics Limited (BEL), Ministry of Defence, India enterprise as a Deputy Engineer. He worked on Dual Output Driver on BiCMOS and Bipolar technology.
In 2013, he has represented IISc and India at the IEEE University Partnership Program (UPP) Leaders Summit at Cambridge, MA, USA. From 2014 - 2016, he is a volunteer and a member of the executive committee of IEEE Bangalore Section.
From November 2013 to March 2015, he was the Founding member and President of Entrepreneurship and Innovation at IISc (EntIISc) a student run body in IISc with the focus on increasing awareness among research students.
His current research interests in Integrated Sensor Interface Design, Capacitance sensors and low power circuits for IoT. He is also serves as a reviewer for TCAS - I & II, IoT Journal, Sadhana journal and various international and national conferences. | |