Search

Kevin P Shaver

Supervisory Patent Examiner (ID: 9936, Phone: (571)272-4720 , Office: P/3754 )

Most Active Art Unit
3104
Art Unit(s)
3754, 3752, 3732, 2899, 3736, 3104, 3108, 3101
Total Applications
1590
Issued Applications
1285
Pending Applications
77
Abandoned Applications
213

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17217727 [patent_doc_number] => 20210351065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => INTERCONNECTION STRUCTURE WITH SIDEWALL PROTECTION LAYER [patent_app_type] => utility [patent_app_number] => 17/383299 [patent_app_country] => US [patent_app_date] => 2021-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17383299 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/383299
INTERCONNECTION STRUCTURE WITH SIDEWALL PROTECTION LAYER Jul 21, 2021 Pending
Array ( [id] => 17203745 [patent_doc_number] => 20210343840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => MANUFACTURING METHOD OF TRENCH MOSFET [patent_app_type] => utility [patent_app_number] => 17/377408 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2800 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377408 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377408
MANUFACTURING METHOD OF TRENCH MOSFET Jul 15, 2021 Pending
Array ( [id] => 17203621 [patent_doc_number] => 20210343716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => Tuning Tensile Strain on FinFET [patent_app_type] => utility [patent_app_number] => 17/376397 [patent_app_country] => US [patent_app_date] => 2021-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3002 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17376397 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/376397
Tuning Tensile Strain on FinFET Jul 14, 2021 Pending
Array ( [id] => 18983516 [patent_doc_number] => 11908703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Light irradiation type heat treatment method [patent_app_type] => utility [patent_app_number] => 17/370026 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 12943 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370026 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/370026
Light irradiation type heat treatment method Jul 7, 2021 Issued
Array ( [id] => 17174192 [patent_doc_number] => 20210327863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => WAFER LEVEL PROXIMITY SENSOR [patent_app_type] => utility [patent_app_number] => 17/360925 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17360925 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/360925
WAFER LEVEL PROXIMITY SENSOR Jun 27, 2021 Pending
Array ( [id] => 17302991 [patent_doc_number] => 20210398830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => HEATING DEVICE, SUBSTRATE PROCESSING SYSTEM, AND HEATING METHOD [patent_app_type] => utility [patent_app_number] => 17/347316 [patent_app_country] => US [patent_app_date] => 2021-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347316 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/347316
HEATING DEVICE, SUBSTRATE PROCESSING SYSTEM, AND HEATING METHOD Jun 13, 2021 Pending
Array ( [id] => 17115648 [patent_doc_number] => 20210296245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => Semiconductor Package and Method [patent_app_type] => utility [patent_app_number] => 17/340556 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9843 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340556
Semiconductor package and method Jun 6, 2021 Issued
Array ( [id] => 17115558 [patent_doc_number] => 20210296155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/340477 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340477 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340477
3D SEMICONDUCTOR DEVICE AND STRUCTURE Jun 6, 2021 Abandoned
Array ( [id] => 17056026 [patent_doc_number] => 20210265460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-26 [patent_title] => High Density Three-dimensional Integrated Capacitors [patent_app_type] => utility [patent_app_number] => 17/316102 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17316102 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/316102
High Density Three-dimensional Integrated Capacitors May 9, 2021 Pending
Array ( [id] => 17417001 [patent_doc_number] => 20220051905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => FORMATION OF LOW-TEMPERATURE AND HIGH-TEMPERATURE IN-SITU DOPED SOURCE AND DRAIN EPITAXY USING SELECTIVE HEATING FOR WRAP-AROUND CONTACT AND VERTICALLY STACKED DEVICE ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 17/196137 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196137 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196137
FORMATION OF LOW-TEMPERATURE AND HIGH-TEMPERATURE IN-SITU DOPED SOURCE AND DRAIN EPITAXY USING SELECTIVE HEATING FOR WRAP-AROUND CONTACT AND VERTICALLY STACKED DEVICE ARCHITECTURES Mar 8, 2021 Pending
Array ( [id] => 16920406 [patent_doc_number] => 20210193498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/195628 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 79401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195628 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/195628
3D SEMICONDUCTOR DEVICE AND STRUCTURE Mar 7, 2021 Pending
Array ( [id] => 17295625 [patent_doc_number] => 20210391464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => INTEGRATED CIRCUIT DEVICE [patent_app_type] => utility [patent_app_number] => 17/179982 [patent_app_country] => US [patent_app_date] => 2021-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17179982 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/179982
Integrated circuit device Feb 18, 2021 Issued
Array ( [id] => 16920480 [patent_doc_number] => 20210193572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => Integrated Fan-Out Package with 3D Magnetic Core Inductor [patent_app_type] => utility [patent_app_number] => 17/174617 [patent_app_country] => US [patent_app_date] => 2021-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12683 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174617 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/174617
Integrated Fan-Out Package with 3D Magnetic Core Inductor Feb 11, 2021 Pending
Array ( [id] => 18464390 [patent_doc_number] => 11688685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Integrated fan-out package with 3D magnetic core inductor [patent_app_type] => utility [patent_app_number] => 17/167273 [patent_app_country] => US [patent_app_date] => 2021-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 32 [patent_no_of_words] => 12689 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17167273 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/167273
Integrated fan-out package with 3D magnetic core inductor Feb 3, 2021 Issued
Array ( [id] => 17010893 [patent_doc_number] => 20210242054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => WAFER TEMPERATURE MEASUREMENT IN AN ION IMPLANTATION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/162108 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29809 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162108 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/162108
Wafer temperature measurement in an ion implantation system Jan 28, 2021 Issued
Array ( [id] => 16850371 [patent_doc_number] => 20210151116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => Memory Devices Comprising Magnetic Tracks Individually Comprising A Plurality Of Magnetic Domains Having Domain Walls And Methods Of Forming A Memory Device Comprising Magnetic Tracks Individually Comprising A Plurality Of Magnetic Domains Having Domain Walls [patent_app_type] => utility [patent_app_number] => 17/160798 [patent_app_country] => US [patent_app_date] => 2021-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6019 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17160798 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/160798
Memory Devices Comprising Magnetic Tracks Individually Comprising A Plurality Of Magnetic Domains Having Domain Walls And Methods Of Forming A Memory Device Comprising Magnetic Tracks Individually Comprising A Plurality Of Magnetic Domains Having Domain Walls Jan 27, 2021 Pending
Array ( [id] => 16981434 [patent_doc_number] => 20210225671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => SEMICONDUCTOR PROCESSING CHAMBER WITH FILAMENT LAMPS HAVING NONUNIFORM HEAT OUTPUT [patent_app_type] => utility [patent_app_number] => 17/152241 [patent_app_country] => US [patent_app_date] => 2021-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17152241 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/152241
Semiconductor processing chamber with filament lamps having nonuniform heat output Jan 18, 2021 Issued
Array ( [id] => 17752818 [patent_doc_number] => 20220231023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => FINFET DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 17/150044 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12497 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17150044 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/150044
FINFET DEVICE AND METHOD Jan 14, 2021 Pending
Array ( [id] => 17862810 [patent_doc_number] => 11443971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => 3D semiconductor device and structure with memory [patent_app_type] => utility [patent_app_number] => 17/146416 [patent_app_country] => US [patent_app_date] => 2021-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 83 [patent_figures_cnt] => 343 [patent_no_of_words] => 79734 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17146416 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/146416
3D semiconductor device and structure with memory Jan 10, 2021 Issued
Array ( [id] => 16812088 [patent_doc_number] => 20210134643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH NAND LOGIC [patent_app_type] => utility [patent_app_number] => 17/145338 [patent_app_country] => US [patent_app_date] => 2021-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 79699 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17145338 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/145338
3D semiconductor device and structure with NAND logic Jan 9, 2021 Issued
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