Block level design method for heterogeneous PG-structure cells | Patent Number 11853678

US 11853678 B2
Application Number18096906
Publication NumberUS 20230153507 A1
Pendency11 months, 17 days
Filled DateJan 13, 2023
Priority DateDec 15, 2016
Publication DateMay 18, 2023
Expiration DateDec 14, 2036
Inventor/ApplicantsChung-Hsing Wang
Yen-Hung Lin
Yuan-Te Hou
ExaminesGARBOWSKI, LEIGH M
Art Unit2851
Technology Center2800
Assignments
Taiwan Semiconductor Manufacturing Company
Current
Taiwan Semiconductor Manufacturing Company
Original
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