Company
Agere Systems (Broadcom)
0 Case(s) (Last 5 Years)
Patents Prosecuted
| Application number | Title of the patent | IPC | Filing Date | Decision Date |
|---|---|---|---|---|
| 13959978 | DYNAMIC SELECTION OF CACHE LEVELS | G06F | Aug 5, 2013 | Apr 15, 2018 |
| 13958162 | Data decoder with trapping set flip bit mapper | H03M, G06F | Aug 1, 2013 | Oct 3, 2016 |
| 13955446 | Switch Device With Device-Specified Bridge Domains | H04L | Jul 30, 2013 | May 7, 2017 |
| 13954084 | Orientation-Based Camera Operation | H04N | Jul 29, 2013 | Sep 20, 2015 |
| 13953241 | Operational Amplifier-Based Current-Sensing Circuit for DC-DC Voltage Converters and The Like | H02M | Jul 28, 2013 | Aug 20, 2015 |
| 13950384 | SUPERRESOLUTION IMAGE PROCESSING USING AN INVERTIBLE SPARSE MATRIX | G06K | Jul 24, 2013 | Jul 1, 2015 |
| 13944311 | Concurrent linked-list traversal for real-time hash processing in multi-core, multi-thread network processors | H04L, G06F | Jul 16, 2013 | Oct 5, 2015 |
| 13943446 | Techniques for providing data redundancy after reducing memory writes | G06F | Jul 15, 2013 | May 12, 2014 |
| 13939345 | STORAGE DEVICE ASSISTED DATA DE-DUPLICATION | G06F | Jul 10, 2013 | Apr 2, 2017 |
| 13936350 | FAN OUT INTEGRATED CIRCUIT DEVICE PACKAGES ON LARGE PANELS | H01L | Jul 7, 2013 | Apr 16, 2015 |
| 13936010 | I/O DEVICE AND COMPUTING HOST INTEROPERATION | G06F | Jul 4, 2013 | Aug 6, 2017 |
| 13934999 | Log-likelihood ratio (LLR) dampening in low-density parity-check (LDPC) decoders | G06F, H03M | Jul 2, 2013 | May 9, 2016 |
| 13933573 | Color Coding and Optical Sub-Band Communication Utilizing Color Coding | H04B | Jul 1, 2013 | Nov 12, 2015 |
| 13932219 | MODULATION OF FLASH PROGRAMMING BASED ON HOST ACTIVITY | G06F | Jun 30, 2013 | Jan 26, 2016 |
| 13917299 | Method to ensure data coherency in a scalable aggregate neighbor-device interface | G06F | Jun 12, 2013 | Jul 7, 2014 |
| 13916667 | Error Detection Based on Superheterodyne Conversion and Direct Downconversion | H04L | Jun 12, 2013 | Sep 28, 2015 |
| 13914753 | INTEGRATED CIRCUIT COMPRISING TEST CIRCUITRY FOR TESTING FAN-OUT PATHS OF A TEST CONTROL PRIMARY INPUT | G01R | Jun 10, 2013 | Nov 17, 2015 |
| 13915580 | METHOD AND SYSTEM OF USING A PARTITION TO OFFLOAD PIN CACHE FROM A RAID CONTROLLER DRAM | G06F | Jun 10, 2013 | Jun 21, 2015 |
| 13912063 | Systems and methods for inter-cell interference mitigation in a flash memory | G06F, H03M, G11C | Jun 5, 2013 | Jan 11, 2016 |
| 13910582 | Enhancing Memory Yield Through Memory Subsystem Repair | G11C | Jun 4, 2013 | Oct 26, 2015 |